參數(shù)資料
型號: MM74C85
廠商: National Semiconductor Corporation
英文描述: 4-Bit Magnitude Comparator(4位數(shù)值比較器)
中文描述: 4位數(shù)值比較(4位數(shù)值比較器)
文件頁數(shù): 1/4頁
文件大小: 116K
代理商: MM74C85
TL/F/5886
M
September 1989
MM54C85/MM74C85 4-Bit Magnitude Comparator
General Description
The MM54C85/MM74C85 is a four-bit magnitude compara-
tor which will perform comparison of straight binary or BCD
codes. The circuit consists of eight comparing inputs (A0,
A1, A2, A3, B0, B1, B2, B3), three cascading inputs (A
l
B,
A
k
B and A
e
B), and three outputs (A
l
B, A
k
B and
A
e
B). This device compares two four-bit words (A and B)
and determines whether they are ‘‘greater than,’’ ‘‘less
than,’’ or ‘‘equal to’’ each other by a high level on the appro-
priate output. For words greater than four-bits, units can be
cascaded by connecting the outputs (A
l
B, A
k
B, and
A
e
B) of the least significant stage to the cascade inputs
(A
l
B, A
k
B and A
e
B) of the next-significant stage. In
addition the least significant stage must have a high level
voltage (V
IN(1)
) applied to the A
e
B input and low level
voltage (V
IN(0)
) applied to A
l
B and A
k
B inputs.
Features
Y
Wide supply voltage range
3.0V to 15V
Y
Guaranteed noise margin
1.0V
Y
High noise immunity
0.4 V
CC
(typ.)
fan out of 2
driving 74L
Y
Low power
TTL compatibility
Y
Expandable to ‘N’ stages
Y
Applicable to binary or BCD
Y
Low power pinout: 54L85/74L85
Logic Diagram
TL/F/5886–1
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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