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參數(shù)資料
| 型號： | MM58242 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | High Voltage Display Driver |
| 中文描述： | 高電壓顯示驅動程序 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 137K |
| 代理商： | MM58242 |
Functional Description
This product is specifically designed to drive multiplexed or
non-multiplexed high voltage alphanumeric or dot matrix
vacuum fluorescent (VF) displays. Character generation is
done externally in the microprocessor, with a serial data
path to the display driver. The MM58242 uses three signals,
DATA IN, CLOCK and ENABLE, where ENABLE acts as an
external load signal. Display blanking can be achieved by
means of the BLANKING CONTROL input, and a logic ‘1’
will turn off all sections of the display. A block diagram of
the MM58242 is shown in Figure 1.
Figure 2 shows the pinout of the MM58242 device, where
output 1 (pin 12) is equivalent to bit 1 (i.e., the first bit of data
to be loaded into the shift register following ENABLE high).
A logic ‘1’ at the input will turn on the corresponding display
digit/segment/dot output.
A significant reduction in discrete board components can be
achieved by use of the MM58242, because external pull-
down resistors are not required. Due to the nature of the
output stage, both its on and off impedance values vary as a
function of the display voltage applied, However,Figures 3a
and 3b show that this output impedance will remain con-
stant for a fixed value of display voltage.
Figure 4 demonstrates the critical timing requirements be-
tween CLOCK and DATA IN for the MM58242.
To clear (reset) the display driver at ‘‘power on’’ or any time,
the following flushing routine may be used. With the enable
signal high, clock in 20 zeroes. Drive the enable signal low
and the display will be blank. It is recommended to clear the
driver at power on.
In Figure 5, the ENABLE signal acts as an envelope, and
only while this signal is at a logic ‘1’ does the circuit accept
CLOCK input signals. Data is transferred and shifted in the
internal shift register on the rising clock edge, i.e., ‘0’–‘1’
transition. When the ENABLE signal goes low, the contents
of the shift registers are latched, and the display will show
new data. During data transfer, the display will show old
data. DATA OUT is also provided on the MM58242 being
output on the falling edge. At any time, the display may be
blanked under processor control, using the BLANKING
CONTROL input.
Figure 6 shows a schematic diagram of a microprocessor-
based system where the MM58242 is used to provide the
grid drive for a 40-digit 2 line 5
c
7 multiplexed vacuum
fluorescent (VF) display. The anode drive in this example is
provided by another member of the high voltage display
driver family, namely the MM58248, which does not require
an externally generated load signal.
TL/F/7924–3
FIGURE 3a. Output Impedance Off
TL/F/7924–4
FIGURE 3b. Output Impedance On
4
相關PDF資料 |
PDF描述 |
|---|---|
| MM58242V | High Voltage Display Driver |
| MM58274CJ | Microprocessor Compatible Real Time Clock |
| MM58274C | Microprocessor Compatible Real Time Clock |
| MM58274CN | Microprocessor Compatible Real Time Clock |
| MM58274CV | Microprocessor Compatible Real Time Clock |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MM58242V | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:High Voltage Display Driver |
| MM58248 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:High Voltage Display Driver |
| MM58248N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:High Voltage Display Driver |
| MM58248V | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:High Voltage Display Driver |
| MM58274BN | 制造商: 功能描述: 制造商:Texas Instruments 功能描述: 制造商:undefined 功能描述: |
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