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參數(shù)資料
| 型號(hào)： | MM58174AN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | Microprocessor-Compatible Real-Time Clock |
| 中文描述： | 0 TIMER(S), REAL TIME CLOCK, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-16 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 130K |
| 代理商： | MM58174AN |
Operating Conditions
MM58174AN
T
A
e b
40
§
C to 85
§
C, V
DD
e
5V
TABLE IV. Read Timing: Data from Peripheral to Microprocessor
Symbol
Parameter
MM58174AN
Typ
Units
Comments
Min
Max
t
ACS0
Address Bus Valid to Chip Select ON (CS
e
0)
0
ns
t
CSR
Chip Select ON to Read Strobe
0
ns
t
RD
Read Cycle Access Time from
Read Strobe to Data Bus Valid
900
450
ns
C
L
e
100 pF
t
RH
Data Hold Time from Trailing Edge of
Read Strobe
0
330
ns
t
RA
Address Bus Hold Time from
Trailing Edge of Read Strobe
70
500
ns
t
ACS1
Address Change to Chip Select OFF
0
40
ns
t
AD
Address Bus Valid to Data Valid
1850
850
ns
C
L
e
100 pF
t
HZ
Time from Trailing Edge of Read
Strobe until Interface Device Bus
Drivers are in TRI-STATE
é
Mode
0
330
ns
t
RW
Read Strobe Width
14
m
s
t
AR
Address Bus Valid to Read Strobe
500
ns
Note 1:
In order not to degrade timekeeping accuracy, the number of Read strobes in any one second should be less than 10,000.
Note 2:
If address and read occur simultaneously then they must exist for t
AR
a
t
AD
.
TABLE V. Write Timing: Data from Microprocessor to Peripheral
Symbol
Parameter
MM58174AN
Typ
Units
Comments
Min
Max
t
ACS0
Address Bus Valid to Chip Select ON (CS
e
0)
0
ns
t
CSW
Chip Select ON to Write Strobe
0
450
ns
t
AW
Address Bus Valid to Write Strobe
725
ns
t
WW
Write Strobe Width
670
ns
t
DW
Data Bus Valid before Write Strobe
70
ns
t
WA
Address Bus Hold Time following Write Strobe
165
ns
t
WD
Data Bus Hold Time following Write Strobe
185
ns
t
ACS1
Address Change to Chip Select OFF (CS
e
1)
0
ns
Note 3:
If address and write occur simultaneously, then they must exist for t
AW
and t
WW
.
7
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