參數(shù)資料
型號: MM54C95N
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: 4-Bit Right-Shift Left-Shift Register
中文描述: CMOS SERIES, 4-BIT RIGHT PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP14
封裝: PLASTIC, DIP-14
文件頁數(shù): 1/4頁
文件大?。?/td> 108K
代理商: MM54C95N
TL/F/5890
M
February 1988
MM54C95/MM74C95
4-Bit Right-Shift Left-Shift Register
General Description
This 4-bit shift register is a monolithic complementary MOS
(CMOS) integrated circuit composed of four D flip-flops.
This register will perform right-shift or left-shift operations
dependent upon the logical input level to the mode control.
A number of these registers may be connected in series to
form an N-bit right-shift or left-shift register.
When a logical ‘‘0’’ level is applied to the mode control in-
put, the output of each flip-flop is coupled to the D input of
the succeeding flip flop. Right-shift operation is performed
by clocking at the clock 1 input, and serial data entered at
the serial input, clock 2 and parallel inputs A through D are
inhibited. With a logical ‘‘1’’ level applied to the mode con-
trol, outputs to succeeding stages are decoupled and paral-
lel loading is possible, or with external interconnection, shift-
left operation can be accomplished by connecting the out-
put of each flip-flop to the parallel input of the previous
flip-flop and serial data is entered at input D.
Features
Y
Medium speed operation
10 MHz (typ.)
V
CC
e
10V, C
L
e
50 pF
0.45 V
CC
(typ.)
100 nW/(typ.)
Drive 2 LTTL loads
Y
High noise immunity
Y
Low power
Y
Tenth power TTL compatible
Y
Wide supply voltage range
3V to 15V
Y
Synchronous parallel load
Y
Parallel inputs and outputs from each flip-flop
Y
Negative edge triggered clocking
MM54C95/MM74C95
MM74L95 Pinout
Y
The
follows
the
MM54L95/
Applications
Y
Data terminals
Y
Instrumentation
Y
Automotive
Y
Medical electronics
Y
Alarm systems
Y
Remote metering
Y
Industrial electronics
Y
Computers
Block and Connection Diagrams
TL/F/5890–1
Dual-In-Line Package
TL/F/5890–4
Order Number MM54C95 or MM74C95
TL/F/5890–2
TL/F/5890–3
Mode Control
e
0 for Right Shift
Mode Control
e
1 for Left Shift or Parallel Load
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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