- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄382328 > MM5034 (National Semiconductor Corporation) Octal 80-Bit Static Shift Register PDF資料下載
參數(shù)資料
| 型號(hào)： | MM5034 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Octal 80-Bit Static Shift Register |
| 中文描述： | 八路80位靜態(tài)移位寄存器 |
| 文件頁(yè)數(shù)： | 2/4頁(yè) |
| 文件大?。?/td> | 108K |
| 代理商： | MM5034 |
Absolute Maximum Ratings
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage
7 V
DC
7 V
DC
Input Voltage
Power Dissipation
750 mW
Storage Temperature Range
b
65
§
C to
a
150
§
C
Lead Temperature (Soldering, 10 sec.)
300
§
C
Electrical Characteristics
V
DD
e
5V
g
5%, T
A
e
0
§
C to
a
70
§
C
Parameter
Conditions
Min
Typ
Max
Units
Clock Input
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
2.2
V
V
0.8
Data and Control Inputs
Logical ‘‘1’’ Input Voltage
Logical ‘‘0’’ Input Voltage
2.2
V
V
0.8
Data, Clock and Control Inputs
Logical ‘‘1’’ Input Current
Input Capacitance
V
IN
e
5V
V
IN
e
2.5V
5.0
8.0
m
A
pF
5.0
Outputs
Logical ‘‘1’’ Output Voltage
Logical ‘‘0’’ Output Voltage
TRI-STATE Output Current
I
OUT
e
100
m
A
I
OUT
e
1.6 mA
V
OUT
e
5V
V
OUT
e
0V
2.4
2.8
0.25
V
V
0.4
b
5.0
5.0
m
A
m
A
Supply Current
60
90
mA
Timing
Clock Frequency
Clock Pulse Width High
Clock Pulse Width Low
Output Rise and Fall Time (t
r
, t
f
)
Set-Up Time
Hold Time
Output Enable Time
Output Disable Time
Clock Rise and Fall Time
Output Delay, (t
PD
)
0
3.0
MHz
ns
ns
ns
ns
ns
ns
ns
m
s
ns
(Figure 1)
(Note 1)
(Figure 1)
(Figure 1)
(Figure 1)
(Figure 1)
(Figure 1)
(Figure 1)
125
125
10,000
%
50
40
100
0
185
185
5.0
185
80
Note 1:
The clock input must be a low level for DC storage. Minimum width assumes 10 ns t
r
and t
f
.
Recirculate and TRI-STATE Operation
Recirculate is used to maintain data in the shift register after
it has been loaded. While the shift register is being loaded,
Recirculate must be at a logical ‘‘0’’. When the loading is
completed, Recirculate should be brought to a logical ‘‘1’’.
This disables the data input and feeds the output of the last
shift cell back to the input of the first shift cell for each of the
8 registers.
For the output to be in the TRI-STATE mode output-select
should be at the logical ‘‘1’’ level.
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MM5034N | Octal 80-Bit Static Shift Register |
| MM5035 | Octal 80-Bit Static Shift Register |
| MM5035N | Octal 80-Bit Static Shift Register |
| MM5309 | DIGITAL CLOCKS |
| MM5309N | DIGITAL CLOCKS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MM5034N | 制造商:Texas Instruments 功能描述:Shift Register, 22 Pin, Plastic, DIP |
| MM5035 | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:Octal 80-Bit Static Shift Register |
| MM5035N | 制造商:National Semiconductor Corporation 功能描述:Shift Register, 20 Pin, Plastic, DIP |
| MM5040H | 制造商:Texas Instruments 功能描述:Shift Register, 8 Pin, Metal, CAN |
| MM5052H | 制造商:National Semiconductor Corporation 功能描述:Shift Register, 10 Pin, Metal, CAN 制造商:Texas Instruments 功能描述:Shift Register, 10 Pin, Metal, CAN |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。