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參數(shù)資料
| 型號： | MM1313 |
| 廠商： | MITSUMI ELECTRIC |
| 英文描述： | I2C BUS Control 5-Input 2-Output AV Switch |
| 中文描述： | I2C總線控制5聲道，2輸出AV系列開關(guān) |
| 文件頁數(shù)： | 10/12頁 |
| 文件大?。?/td> | 312K |
| 代理商： | MM1313 |
MITSUMI
I
2
C BUS Control 5-Input 2-Output AV Switch MM1313
[Status Register]
The status register contains data for sending device status to the master.
The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the
slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 1 when
using as a status register.
The MM1313 slave address can be selected as 91H/93H depending on the status of the ADR pin. When the
ADR pin is low it is 91H. However, the confirmation response after completion of the status register should be
non-acknowledge.
The status register output data as shown below.
P-ON RESET : Returns 1 for power on reset. However once data read begins, 0 is returned next.
S1/S2 OPEN : Returns 0 when the S1/S2 pin is not open, and returns 1 when the S1/S2 pin is open
S1/S2 SEL : Returns 0 when the S1/S2 pin is not grounded, and returns 1 when the S1/S2 pin is grounded.
S1/S2 OPEN, SEL have 3-value discrimination, and the combinations are as shown below.
[Power On Reset]
Power on reset is built in to reset each control register to 0 when power is turned on.
Power on reset threshold has hysteresis as shown in the figure below. The IC power on reset status can be
discriminated by reading the status register P-ON RESET.
S
Slave address
0
1
R/W
1
A
Status register
b5
b4
NA
P
1
0
0
0
0/1
b7
b6
b3
b2
b1
b0
Address byte
Status data
b7
b6
b5
S1
b4
S1
SEL
b3
S2
b2
S2
SEL
b1
b0
P-ON
RESET
OPEN
OPEN
S1/S2 pin DC voltage
S1/S2 OPEN
0
0
1
S1/S2 SEL
1
0
0
0.8V or less
1.3V or more, 3.5V or less
4.5V or more
Reset released
Reset status
Undefined
0.6V
4.3V
5.4V
V
CC
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