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參數(shù)資料
| 型號(hào)： | ML6401CS-3 |
| 英文描述： | 8-Bit 20 MSPS A/D Converter |
| 中文描述： | 8位20 MSPS的A / D轉(zhuǎn)換 |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大?。?/td> | 554K |
| 代理商： | ML6401CS-3 |
March 1997
ML6401
*
8-Bit 20 MSPS A/D Converter
1
GENERAL DESCRIPTION
The ML6401 is a single-chip 8-bit 20 MSPS BiCMOS Video
A/D Converter IC, incorporating a differential input track
and hold, clock generation circuitry, and reference voltage.
The input track and hold consists of a low (4pF)
capacitance input and a fast settling operational amplifier.
The A/D conversion is accomplished through a pipeline
approach, reducing the number of required comparators
and latches. The non-over-lapping clocks required for this
architecture are all internally generated. Clock generation
circuitry requires only one 50% duty cycle clock input.
The use of error correction throughout the A/D converter
improves DNL. All bias voltages and currents required by
the A/D converter are internally generated. The digital
outputs are three-stateable.
FEATURES
I
5.0V
±
10% single supply operation
I
Internal reference voltage
I
Power dissipation less than 200mW typical
I
Replaces TMC1175MC20 and AD775JR,
functionally compatible to Sony CXD1175AM/AP
I
16-pin reduced pin count packages
available: ML6401CS-3
I
Low input capacitance track and hold: 4pF
I
Onboard non-overlapping clock generation to
minimize external components
I
Three-state outputs and no missing codes
I
150MHz input track and hold
BLOCK DIAGRAM/TYPICAL APPLICATION
*Some Packages Are End Of Life
DIGITAL
ERROR
CORRECTION
OE
D7
D6
D5
D4
D3
D2
D1
D0
VDD
D
VDD
A
VDD
A
VDD
A
VDD
D
GND
O
GND
D
GND
A
GND
A
CLK
5V
CLOCK GENERATOR
20MHz
SUB
DAC
AMP
SUB
DAC
AMP
ADC 3
ADC 2
ADC 1
150MHz
T & H
V
IN
+
V
IN
–
INTERNAL
REFERENCES
1.5V
1.0V
1k
1k
75
VIDEO
INPUT
+
+
10
μ
F
47
μ
F
0.1
μ
F
VIN
-BIAS
VREF
OUT
VREF
IN
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