- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359733 > ML2258 (Fairchild Semiconductor Corporation) μP Compatible 8-Bit A/D Converters with 8-Channel Multiplexer(具有八通道多路轉換器的微處理器兼容的8位A/D轉換器) PDF資料下載
參數(shù)資料
| 型號： | ML2258 |
| 廠商： | Fairchild Semiconductor Corporation |
| 元件分類： | 串行ADC |
| 英文描述： | μP Compatible 8-Bit A/D Converters with 8-Channel Multiplexer(具有八通道多路轉換器的微處理器兼容的8位A/D轉換器) |
| 中文描述： | 微處理器兼容的8位A / D轉換器與8通道多路復用器（具有八通道多路轉換器的微處理器兼容的8位的A / D轉換器） |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 169K |
| 代理商： | ML2258 |
ML2258
7
1.0 FUNCTIONAL DESCRIPTION
1.1 MULTIPLEXER ADDRESSING
The ML2258 contains an 8-channel single ended analog
multiplexer. A particular input channel is selected by using
the address decoder. The relationship between the address
inputs, ADDR0–ADDR2, and the analog input selected is
shown in Table 1. The address inputs are latched into the
decoder on the rising edge of the address latch signal ALE.
SELECTED
ADDRESS INPUT
ADDR2
ADDR1
ANALOG CHANNEL
ADDR0
IN0
0
0
0
IN1
0
0
1
IN2
0
1
0
IN3
0
1
1
IN4
1
0
0
IN5
1
0
1
IN6
1
1
0
IN7
1
1
1
Table 1. Multiplexer Address Decoding
1.2 A/D CONVERTER
The A/D converter uses successive approximation to
perform the conversion. The converter is composed of the
successive approximation register, the DAC and the
comparator.
The DAC generates the precise levels that determine the
linearity and accuracy of the conversion. The DAC is
composed of a capacitor upper array and a resistor lower
array. The capacitor upper array generates the 4 MSB
decision levels while the series resistor lower array generates
the 4 LSB decision levels. A switch decoder tree is used to
decode the proper level from both arrays.
The capacitor/resistor array offers fast conversion, superior
linearity and accuracy since matching is only required
between 2
4
= 16 elements (as opposed to 2
8
= 256
elements in conventional designs). And since the levels are
based on the ratio of capacitors to capacitors and resistors to
resistors, the accuracy and long term stability of the
converter is improved. This also guarantees monotonicity
and no missing codes, as well as eliminating any linearity
temperature or power supply dependence.
The successive approximation register is a digital block used
to store the bit decisions from the conversion.
The comparator design is unique in that it is fully differential
and auto-zeroed. The fully differential architecture provides
excellent noise immunity, excellent power supply rejection,
and wide common mode range. The comparator is auto
zeroed at the start of each conversion in order to remove
any DC offset and full scale gain error, thus improving
accuracy and linearity.
Another advantage of the capacitor array approach used in
the ML2258 over conventional designs is the inherent
sample and hold function. This true S/H allows an accurate
conversion to be done on the input even if the analog signal
is not stable. Linearity and accuracy are maintained for
analog signals up to 1/2 the sampling frequency. As a result,
input signals up to 75kHz can be converted without
degradation in linearity or accuracy.
The sequence of events during a conversion is shown in
figure 5. The rising edge of a START pulse resets the internal
registers and the falling edge initiates a conversion on the
next rising edge of CLK. Four CLK pulses later, sampling of
the analog input begins. The input is then sampled for the
next four CLK periods until EOC goes low. EOC goes low on
the rising edge of the 8th CLK pulse indicating that the
conversion is now beginning. The actual conversion now
takes place for the next 56 CLK pulses, one bit for each 7
CLK pulses. After the conversion is done, the data is updated
on DB0–DB7 and EOC goes high on the rising edge of the
67th CLK pulse, indicating that the conversion has been
completed and data is valid on DB0–DB7. The data will stay
Figure 5. Timing Diagram
1/f
CLK
t
SS
t
WS
t
WALE
t
H
t
S
t
H
t
DIS
t
EN
CLK
START
ALE
ADDR0–ADDR2
EOC
DB0–DB7
OE
1
2
4
3
5
6
7
8
66
67
68
69
70
PREVIOUS DATA
DATA
t
C
t
EOC
相關PDF資料 |
PDF描述 |
|---|---|
| ML2259 | μP Compatible 8-Bit A/D Converters with 8-Channel Multiplexer(具有八通道多路轉換器的微處理器兼容的8位A/D轉換器) |
| ML6426 | High Bandwidth Triple Video Filters with Buffered Outputs(輸出緩沖的寬帶三路視頻濾波器) |
| MAN8410 | 0.800-INCH SEVEN SEGMENT DISPLAYS |
| MDA6140C | 0.54 INCH (13.7MM) 14 SEGMENT, DUAL DIGIT ALPHA-NUMERIC STICK DISPLAY |
| MAN6710 | RESISTORS RoHS Compliant: Yes |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ML2258 WAF UP | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| ML2258BIP | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible 8-Bit A/D Converter with 8-Channel Multiplexer |
| ML2258BIQ | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible 8-Bit A/D Converter with 8-Channel Multiplexer |
| ML2258CIP | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible 8-Bit A/D Converter with 8-Channel Multiplexer |
| ML2258CIQ | 制造商:Rochester Electronics LLC 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。