- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377969 > ML2004IP (FAIRCHILD SEMICONDUCTOR CORP) Logarithmic Gain/Attenuator PDF資料下載
參數(shù)資料
| 型號： | ML2004IP |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | Logarithmic Gain/Attenuator |
| 中文描述： | LOG OR ANTILOG AMPLIFIER, 0.0199 MHz BAND WIDTH, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大小： | 88K |
| 代理商： | ML2004IP |
www.fairchildsemi.com
REV. 1.1.1 3/19/01
Features
Low noise: 0 dBrnc max with +24dB gain
Low harmonic distortion: -60dB max
Gain range: –24 to +24dB
Resolution: 0.1dB steps
Flat frequency response:
±0.05dB from .3–4 kHz
±0.10dB from .1-20 kHz
Low supply current 4mA max from ±5V supplies
TTL/CMOS compatible digital interface
ML2003 has pin selectable serial or parallel interface;
ML2004 serial interface only
General Description
The ML2003 and ML2004 are digitally controlled logarith-
mic gain/attenuators with a range of –24 to +24 dB in 0.1 dB
steps.
The gain settings are selected by a 9-bit digital word.
The ML2003 digital interface is either parallel or serial.
The ML2004 is packaged in a 14-pin DIP with a serial
interface only.
Absolute gain accuracy is 0.05dB max over supply tolerance
of ±10% and temperature range.
These CMOS logarithmic gain/attenuators are designed for a
wide variety of applications in telecom, audio, sonar, or gen-
eral purpose function generation. One specific intended
application is analog telephone lines.
Block Diagram
Pin Connections
V
OUT
V
IN
V
CC
P
DN
A GND
V
SS
GND
+
16
16
C0
C1
F0
F2
9
C2
C3
F1
F3
F2
(SCK)
C2
(LATI)
ATTEN/
GAIN
C1
(SID)
(LC0
F0
(SOD)
–
C3
(LATI)C2
(SID)C1
C0 (LATO)
NC
P
DN
F3
F2 (SCK)
V
OUT
V
SS
A GND
NC
NC
(LATO)C0
P
DN
F3
(SCK)F2
F1
GND
C
F
G
S
F
V
I
C
C
A
V
C
1
4
5
6
7
8
18
17
16
15
14
1 20 19
2
3
11 12 13
10
9
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
ATTEN/GAIN
ML2003
18-PIN DIP
20-Pin PCC
ML2003
TOP VIEW
TOP VIEW
V
CC
V
OUT
V
SS
A GND
V
IN
NC
F0 (SOD)
SER/PAR
COURSE
DECODER/MODE SELECTOR
9-BIT LATCH &
SHIFT REGISTER
SWITCHES
NOTE: SERIAL MODE FUNCTIONS INDICATED BY PARENTHESES.
SWITCHES
+
–
FINE
+
–
BUFFER
SER/PAR
LATI
SID
LATO
P
DN
NC
SCK
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
ML2004
14-PIN DIP
TOP VIEW
V
CC
V
OUT
V
SS
A GND
V
IN
NC
SOD
ML2003, ML2004
Logarithmic Gain/Attenuator
相關PDF資料 |
PDF描述 |
|---|---|
| ML2003 | Logarithmic Gain/Attenuaor With Serial and Parallel Interface(串/并行接口的對數(shù)增益衰減器) |
| ML2008 | μP Compatible Logarithmic Gain/Attenuator(微處理器兼容的對數(shù)增益衰減器) |
| ML2009 | μP Compatible Logarithmic Gain/Attenuator(微處理器兼容的對數(shù)增益衰減器) |
| ML2020 | Telephone Line Equalizer(電話線均衡器) |
| ML2021 | Telephone Line Equalizer(電話線均衡器) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ML2008 | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible Logarithmic Gain/Attenuator |
| ML2008CP | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible Logarithmic Gain/Attenuator |
| ML2008CQ | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible Logarithmic Gain/Attenuator |
| ML2008IP | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible Logarithmic Gain/Attenuator |
| ML2008IQ | 制造商:MICRO-LINEAR 制造商全稱:MICRO-LINEAR 功能描述:レP Compatible Logarithmic Gain/Attenuator |
發(fā)布緊急采購，3分鐘左右您將得到回復。