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參數(shù)資料
| 型號(hào)： | MK9173-15CS08LFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 9173 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 162K |
| 代理商： | MK9173-15CS08LFT |
Integrated
Circuit
Systems, Inc.
General Description
Features
Integrated Circuit Systems, Incorporated 525 Race Street San Jose CA 95126 (408) 295-9800tel www.icst.com
MK9173-01
MK9173-15
Block Diagram
Video Genlock PLL
MDS 9173-01/15 B
Designed to replace the AV9173 in most applications
Phase-detector/VCO circuit block
Ideal for genlock system
Reference clock range 12 kHz to 1M Hz for full
output clock range
Output clock range 1.25 to 75 M Hz (-01), 0.625 to
37.5 MHz (-15), see Table 1 for conditions
On-chip loop filter
Single 5 volt power supply
Low power CMOS technology
Small 8-pin SOIC package
The MK9173-01 and MK9173-15 provide the analog PLL
circuit blocks to implement a frequency multiplier. Because
the device is configured to use an external divider in the PLL
clock feedback path, a large divider can be used to result in a
large frequency multiplication ratio. This is useful when using
a low frequency input clock to generate a high frequency
output clock. The MK9173-01/15 contains a phase detector,
charge pump, loop filter, and voltage-controlled oscillator
(VCO). The ICS674-01 can be used as the external feedback
divider.
A common application of the MK9173-01/-15 is the
implementation of a video genlock circuit. Because of this,
the MK9173-01/-15 inputs operate on the negative-going
clock edge.
The MK9173-01/15 is pin and function compatible to the
AV9173-01/15. Please refer to page 4 regarding performance
differences. For new video genlock designs, please refer to the
ICS673-01, ICS1522 or ICS1523.
121400
相關(guān)PDF資料 |
PDF描述 |
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| MK9173-01CS08LFT | 9173 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| MK9173-01CS08LF | 9173 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| MK9173-15CS08T | 9173 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| MK9173-15CS08LFT | 9173 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| ML6516244CR | BICMOS SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK9173-15CS08T | 功能描述:IC PLL VIDEO GENLOCK 8-SOIC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MK9-1A66B | 制造商:MEDER 制造商全稱:Meder Electronic 功能描述:Reed Sensor Incorporated into a Hirschmann Connector |
| MK9-1A66C | 制造商:MEDER 制造商全稱:Meder Electronic 功能描述:Reed Sensor Incorporated into a Hirschmann Connector |
| MK9-1A66D | 制造商:MEDER 制造商全稱:Meder Electronic 功能描述:Reed Sensor Incorporated into a Hirschmann Connector |
| MK9-1A66E | 制造商:MEDER 制造商全稱:Meder Electronic 功能描述:Reed Sensor Incorporated into a Hirschmann Connector |
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