參數(shù)資料
型號： MK51DX256ZCLL10
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, LQFP-100
文件頁數(shù)： 39/74頁
文件大小： 1031K
代理商： MK51DX256ZCLL10
Table 28. 16-bit ADC with PGA characteristics (continued)
Symbol
Description
Conditions
Min.
Typ.1
Max.
Unit
Notes
IDC_PGA
Input DC current
A
Gain =1, VREFPGA=1.2V,
VCM=0.5V
—
1.54
—
μA
Gain =64, VREFPGA=1.2V,
VCM=0.1V
—
0.57
—
μA
G
Gain4
PGAG=0
PGAG=1
PGAG=2
PGAG=3
PGAG=4
PGAG=5
PGAG=6
0.95
1.9
3.8
7.6
15.2
30.0
58.8
1
2
4
8
16
31.6
63.3
1.05
2.1
4.2
8.4
16.6
33.2
67.8
RAS < 100Ω
BW
Input signal
bandwidth
16-bit modes
< 16-bit modes
—
4
40
kHz
PSRR
Power supply
rejection ratio
Gain=1
TBD
—
dB
VDDA= 3V
±100mV,
fVDDA= 50Hz,
60Hz
CMRR
Common mode
rejection ratio
Gain=1
Gain=64
TBD
—
dB
VCM=
500mVpp,
fVCM= 50Hz,
100Hz
VOFS
Input offset
voltage
—
0.2
TBD
mV
Output offset =
VOFS*(Gain+1)
TGSW
Gain switching
settling time
—
10
s
dG/dT
Gain drift over
temperature
Gain=1
Gain=64
—
TBD
ppm/°C
0 to 50°C
dVOFS/dT Offset drift over
temperature
Gain=1
—
TBD
ppm/°C 0 to 50°C, ADC
Averaging=32
dG/dVDDA Gain drift over
supply voltage
Gain=1
Gain=64
—
TBD
%/V
VDDA from 1.71
to 3.6V
EIL
Input leakage
error
All modes
IIn × RAS
mV
IIn = leakage
current
(refer to the
MCU's voltage
and current
operating
ratings)
Table continues on the next page...
Peripheral operating requirements and behaviors
K51 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
44
Preliminary
Freescale Semiconductor, Inc.
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