參數(shù)資料
型號: MK51DN512ZCLL10
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, LQFP-100
文件頁數(shù): 30/74頁
文件大?。?/td> 1031K
代理商: MK51DN512ZCLL10
The bytes not assigned to data flash via the FlexNVM partition code are used by the
FTFL to obtain an effective endurance increase for the EEPROM data. The built-in
EEPROM record management system raises the number of program/erase cycles that can
be attained prior to device wear-out by cycling the EEPROM data through a larger
EEPROM NVM storage space.
While different partitions of the FlexNVM are available, the intention is that a single
choice for the FlexNVM partition code and EEPROM data set size is used throughout the
entire lifetime of a given application. The EEPROM endurance equation and graph
shown below assume that only one configuration is ever used.
Writes_subsystem =
× Write_efficiency × n
EEPROM – 2 × EEESPLIT × EEESIZE
EEESPLIT × EEESIZE
nvmcycd
where
Writes_subsystem — minimum number of writes to each FlexRAM location for
subsystem (each subsystem can have different endurance)
EEPROM — allocated FlexNVM for each EEPROM subsystem based on DEPART;
entered with Program Partition command
EEESPLIT — FlexRAM split factor for subsystem; entered with the Program
Partition command
EEESIZE — allocated FlexRAM based on DEPART; entered with Program Partition
command
Write_efficiency —
0.25 for 8-bit writes to FlexRAM
0.50 for 16-bit or 32-bit writes to FlexRAM
nnvmcycd — data flash cycling endurance
Peripheral operating requirements and behaviors
K51 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
36
Preliminary
Freescale Semiconductor, Inc.
相關(guān)PDF資料
PDF描述
MK51DX256ZCMC10R 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA121
MK51DX256ZCMC10 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA121
MK51N512CLQ100R 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP144
MK51N512CMD100R 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA144
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