參數(shù)資料
型號(hào): MK51DN256ZCMD10
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA144
封裝: 13 X 13 MM, MAPBGA-144
文件頁(yè)數(shù): 53/77頁(yè)
文件大?。?/td> 1066K
代理商: MK51DN256ZCMD10
Table 44. USB VREG electrical specifications
(continued)
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
IDDstby
Quiescent current — Standby mode, load
current equal zero
1
TBD
μA
IDDoff
Quiescent current — Shutdown mode
VREGIN = 5.0 V and temperature=25C
Across operating voltage and temperature
500
TBD
nA
μA
ILOADrun
Maximum load current — Run mode
120
mA
ILOADstby
Maximum load current — Standby mode
1
mA
VReg33out Regulator output voltage — Input supply
(VREGIN) > 3.6 V
Run mode
Standby mode
3
TBD
3.3
2.8
3.6
V
VReg33out Regulator output voltage — Input supply
(VREGIN) < 3.6 V, pass-through mode
TBD
3.6
V
COUT
External output capacitor
1.76
2.2
8.16
μF
ESR
External output capacitor equivalent series
resistance
1
100
ILIM
Short circuit current
TBD
290
TBD
mA
1. Operating in pass-through mode: regulator output voltage equal to the input voltage minus a drop proportional to ILoad.
6.8.4 DSPI switching specifications (low-speed mode)
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with
master and slave operations. Many of the transfer attributes are programmable. The tables
below provides DSPI timing characteristics for classic SPI timing modes. Refer to the
DSPI chapter of the Reference Manual for information on the modified transfer formats
used for communicating with slower peripheral devices.
Table 45. Master mode DSPI timing (low-speed mode)
Num
Description
Min.
Max.
Unit
Notes
Operating voltage
1.71
3.6
V
Frequency of operation
12.5
MHz
DS1
DSPI_SCK output cycle time
4 x tBUS
ns
DS2
DSPI_SCK output high/low time
(tSCK/2) - 4
(tSCK/2) + 4
ns
DS3
DSPI_PCSn valid to DSPI_SCK delay
(tBUS x 2)
4
ns
Table continues on the next page...
Peripheral operating requirements and behaviors
K51 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
Freescale Semiconductor, Inc.
Preliminary
57
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