參數(shù)資料
型號(hào)： MK50X256CLK100R
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, LQFP-80
文件頁數(shù)： 33/72頁
文件大?。?/td> 1836K
代理商： MK50X256CLK100R
6.6.1 ADC electrical specifications
The 16-bit accuracy specifications listed in Table 24 and Table 25 are achievable on the
differential pins ADCx_DP0, ADCx_DM0, ADCx_DP1, ADCx_DM1, ADCx_DP3, and
ADCx_DP3.
The ADCx_DP2 and ADCx_DM2 ADC inputs are used as the PGA inputs and are not
direct device pins. Accuracy specifications for these pins are defined in Table 26 and
All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy
specifications.
6.6.1.1 16-bit ADC operating conditions
Table 24. 16-bit ADC operating conditions
Symbol
Description
Conditions
Min.
Max.
Unit
Notes
VDDA
Supply voltage
Absolute
1.71
—
3.6
V
ΔVDDA
Supply voltage
Delta to VDD (VDD-
VDDA)
-100
0
+100
mV
ΔVSSA
Ground voltage
Delta to VSS (VSS-
VSSA)
-100
0
+100
mV
VREFH
ADC reference
voltage high
1.13
VDDA
V
VREFL
Reference
voltage low
VSSA
V
VADIN
Input voltage
VREFL
—
VREFH
V
CADIN
Input
capacitance
16 bit modes
8/10/12 bit
modes
—
8
4
10
5
pF
RADIN
Input resistance
—
2
5
kΩ
RAS
Analog source
resistance
13/12 bit modes
fADCK < 4MHz
—
5
kΩ
fADCK
ADC conversion
clock frequency
≤13 bit modes
1.0
—
18.0
MHz
fADCK
ADC conversion
clock frequency
16 bit modes
2.0
—
12.0
MHz
Table continues on the next page...
Peripheral operating requirements and behaviors
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
39
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