參數(shù)資料
型號: MK50N512CLL100R
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, LQFP-100
文件頁數(shù): 37/73頁
文件大?。?/td> 1829K
代理商: MK50N512CLL100R
Table 25. 16-bit ADC characteristics (VREFH = VDDA, VREFL = VSSA) (continued)
Symbol
Description
Min.
Typ.2
Max.
Unit
Notes
DNL
Differential non-
linearity
≤13 bit modes
<12 bit modes
±0.7
±0.2
±TBD
±0.5
LSB4
ADC
conversion
clock
<12MHz,
Max
hardware
averaging
(AVGE =
%1, AVGS
= %11)
INL
Integral non-
linearity
≤13 bit modes
<12 bit modes
±1.0
±0.5
±TBD
LSB4
Max
averaging
EFS
Full-scale error
≤13 bit modes
<12 bit modes
±0.4
±1.0
±TBD
LSB4
VADIN =
VDDA
EQ
Quantization
error
16 bit modes
≤13 bit modes
-1 to 0
±0.5
LSB4
ENOB
Effective number
of bits
16 bit differential mode
Avg=32
Avg=1
16 bit single-ended mode
Avg=32
Avg=1
TBD
13.6
13.2
TBD
bits
SINAD
Signal-to-noise
plus distortion
See ENOB
6.02 × ENOB + 1.76
dB
THD
Total harmonic
distortion
16 bit differential mode
Avg=32
16 bit single-ended mode
Avg=32
-94
TBD
dB
SFDR
Spurious free
dynamic range
16 bit differential mode
Avg=32
16 bit single-ended mode
Avg=32
TBD
95
TBD
dB
Table continues on the next page...
Peripheral operating requirements and behaviors
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
42
Preliminary
Freescale Semiconductor, Inc.
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