參數(shù)資料
型號(hào)： MK40N512VLK100
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, LQFP-80
文件頁(yè)數(shù)： 10/63頁(yè)
文件大?。?/td> 1742K
代理商： MK40N512VLK100
Symbol
Description
Min.
Max.
Unit
Notes
fFLASH
Flash clock
—
1
MHz
5.2.2 General switching specifications
These general purpose specifications apply to all signals configured for GPIO, UART,
CAN, CMT, and I2C signals.
Symbol
Description
Min.
Max.
Unit
Notes
GPIO pin interrupt pulse width (digital glitch filter
disabled) — Synchronous path
1.5
—
Bus clock
cycles
GPIO pin interrupt pulse width (digital glitch filter
disabled, analog filter enabled) — Asynchronous path
100
—
ns
GPIO pin interrupt pulse width (digital glitch filter
disabled, analog filter disabled) — Asynchronous path
16
—
ns
External reset pulse width (digital glitch filter disabled)
TBD
—
Mode select (EZP_CS) hold time after reset
deassertion
2
—
Bus clock
cycles
Port rise and fall time (high drive strength)
Slew disabled
Slew enabled
—
12
36
ns
Port rise and fall time (low drive strength)
Slew disabled
Slew enabled
—
32
36
ns
1. The greater synchronous and asynchronous timing must be met.
2. This is the shortest pulse that is guaranteed to be recognized.
3. 75pF load
4. 15pF load
5.3 Thermal specifications
5.3.1 Thermal operating requirements
Table 9. Thermal operating requirements
Symbol
Description
Min.
Max.
Unit
TJ
Die junction temperature
–40
125
°C
TA
Ambient temperature
–40
105
°C
General
K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
18
Preliminary
Freescale Semiconductor, Inc.
相關(guān)PDF資料
PDF描述
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