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參數(shù)資料
| 型號(hào)： | MK3732-05S |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 108 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| 封裝： | 0.150 INCH, SOIC-16 |
| 文件頁(yè)數(shù)： | 1/4頁(yè) |
| 文件大?。?/td> | 59K |
| 代理商： | MK3732-05S |
MK3732-05
Low Phase Noise VCXO+Multiplier
MDS 3732-05 B
1
Revision 101001
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126 (408)295-9800 tel www.icst.com
Block Diagram
Description
Features
The MK3732-05 is a low cost, low jitter, high
performance VCXO and PLL clock synthesizer
designed to replace expensive discrete VCXOs
and multipliers. The on-chip Voltage Controlled
Crystal Oscillator (VCXO) accepts a 0 to 3.3 V
input voltage to cause the output clocks to vary by
±100 ppm. Using ICS’ patented VCXO and analog
Phase-Locked Loop (PLL) techniques, the
device uses an inexpensive 10 MHz to 18 MHz
pullable crystal input to produce one or two output
clocks.
ICS manufactures the largest variety of Set-Top
Box and multimedia clock synthesizers for all
applications. Consult ICS to eliminate VCXOs,
crystals and oscillators from your board.
For a 5 V version of this chip use the MK2732-05.
Packaged in 16 pin narrow SOIC
Replaces a VCXO and multiplier
Uses an inexpensive pullable crystal
Output clocks up to 108 MHz
On-chip patented VCXO with pull range of
200 ppm (±100 ppm) minimum
VCXO tuning voltage of 0 to 3.3 V
Zero ppm synthesis error in both clocks
Advanced, low power, sub-micron CMOS process
3.3 V operating voltage
Industrial temperature version available
Voltage
Controlled
Crystal
Oscillator
PLL/Clock
Synthesis
Circuitry
CLK1
10-18 MHz
pullable
crystal
X1
X2
VIN
Output
Buffer
CLK2
Output
Buffer
OE
S2:S0
3
VDD
GND
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| MK3732-07 | 制造商:ICS 制造商全稱:ICS 功能描述:ADSL VCXO CLOCK SOURCE |
| MK3732-07S | 制造商:ICS 制造商全稱:ICS 功能描述:ADSL VCXO CLOCK SOURCE |
| MK3732-07SI | 制造商:ICS 制造商全稱:ICS 功能描述:ADSL VCXO CLOCK SOURCE |
| MK3732-07SITR | 制造商:ICS 制造商全稱:ICS 功能描述:ADSL VCXO CLOCK SOURCE |
| MK3732-07STR | 制造商:ICS 制造商全稱:ICS 功能描述:ADSL VCXO CLOCK SOURCE |
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