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參數(shù)資料
| 型號： | MK3235-01STR |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 14.3 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 67K |
| 代理商： | MK3235-01STR |
MK3235
Handheld System Clock Synthesizer
MDS 3235 D
1
Revision 092397
Printed 11/16/00
Integrated Circuit Systems, Inc.525 Race StreetSan JoseCA95126(408)295-9800telwww.icst.com
I C R O
C LOC K
Input crystal frequency of 32.768 kHz
Lowest power solution available
Lowest profile clock solution where height is critical
Three output clocks
3.3V or 5.0V operation
Duty cycle of 45/55
14.3MHz or 14.3MHz+Comm clock power downs
Separate battery supply pin for 32 kHz runs to 2V
IDD less than 4A when 32 kHz running
Packaged in 16 pin narrow SOIC
The MK3235 is the smallest size, lowest power system
clock synthesizer available. It is the ideal way to
generate clocks for handheld computers, such as PDAs,
PICs, and other devices where low power is required.
Using analog Phase-Locked Loop (PLL) techniques,
the device operates from a single 32.768 kHz crystal to
produce the 32.768kHz, 14.318MHz, and serial
communications output clocks.
The device has three power down modes for the
14.3MHz, communications, and 32.768kHz clocks.
The MK3235 can save board space and cost even if it
only replaces the 32kHz oscillator circuitry and one
additional surface mount crystal or oscillator. The
extremely low IDD, the ease of surface mounting, and
the power down capability are added benefits in using
the part.
Description
Features
Crystal
Oscillator
VDD
GND
14.318MHz
Clock Synthesis
and Control
Circuitry
14.3 MHz
32.768 kHz
1.843 or
3.686 MHz
Output
Buffer
Output
Buffer
Output
Buffer
32.768 kHz
crystal
Block Diagram
VDD32
PDCOMM
PD14
PD
X1
X2
Communications
Clock Synthesis
and Control
Circuitry
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