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參數(shù)資料
| 型號： | MK2754S |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 54 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, SOIC-8 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 57K |
| 代理商： | MK2754S |
MK2754
Low Cost 54 MHz VCXO
MDS 2754 B
3
Revision 011698
Printed 11/16/00
MicroClock Division of ICS1271 Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
I C R O
C LOC K
Parameter
Conditions
Minimum
Typical
Maximum
Units
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Referenced to GND
7
V
Inputs and Clock Outputs
Referenced to GND
-0.5
VDD+0.5
V
Ambient Operating Temperature
0
70
°C
Soldering Temperature
Max of 10 seconds
260
°C
Storage temperature
-65
150
°C
DC CHARACTERISTICS (VDD = 5.0V unless noted)
Operating Voltage, VDD
4.75
5.25
V
Output High Voltage, VOH
IOH=-25mA
2.4
V
Output Low Voltage, VOL
IOL=25mA
0.4
V
Output High Voltage, VOH, CMOS level
IOH=-8mA
VDD-0.4
V
Operating Supply Current, IDD
No Load
20
mA
Short Circuit Current
±100
mA
VIN, VCXO control voltage
0
3
V
AC CHARACTERISTICS (VDD = 5.0V unless noted)
Input Crystal Frequency
13.50000
MHz
Input Crystal Accuracy
±30
ppm
Output Clock Rise Time
0.8 to 2.0V
1.5
ns
Output Clock Fall Time
2.0 to 0.8V
1.5
ns
Output Clock Duty Cycle
At 1.4V
40
50
60
%
Maximum Absolute Jitter, short term
200
ps
54 MHz output pullability, note 2
0V
≤ VIN ≤ 3V
±100
ppm
Electrical Specifications
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With a MicroClock approved pullable crystal.
External Components
The MK2754 requires a minimum number of external components for proper operation. A decoupling
capacitor of 0.1F should be connected between VDD and GND on pins 2 and 4, as close to the MK2754
as possible. A series termination resistor of 33
may be used for the clock output. The input crystal must be
connected as close to the chip as possible. The input crystal should be a parallel mode, pullable, AT cut,
13.5MHz, with 14pF load capacitance. Consult MicroClock for recommended suppliers. IMPORTANT -
read application note MAN05 before laying out the PCB.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK2761ASLFTR | 27 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO16 |
| MK2761ASLF | 27 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO16 |
| MK2761ASTR | 27 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK2761ASLF | 27 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| MK2761AS | 27 MHz, OTHER CLOCK GENERATOR, PDSO16 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK2754STR | 制造商:ICS 制造商全稱:ICS 功能描述:Low Cost 54 MHz VCXO |
| MK2761A | 制造商:ICS 制造商全稱:ICS 功能描述:Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body) |
| MK2761AS | 功能描述:IC CLK SOURCE SET-TOP 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| MK2761ASLF | 功能描述:時鐘合成器/抖動清除器 SET TOP CLOCK SOURCE RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| MK2761ASLFTR | 功能描述:IC CLK SOURCE SET-TOP 16-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計(jì)時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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