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參數(shù)資料
| 型號(hào)： | MK20X256VLK100 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, LQFP-80 |
| 文件頁數(shù)： | 36/65頁 |
| 文件大?。?/td> | 1755K |
| 代理商： | MK20X256VLK100 |
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Table 27. 16-bit ADC with PGA characteristics (continued)
Symbol
Description
Conditions
Min.
Typ.1
Max.
Unit
Notes
ENOB
Effective number
of bits
Gain=1, Average=4
Gain=1, Average=8
Gain=64, Average=4
Gain=64, Average=8
Gain=1, Average=32
Gain=2, Average=32
Gain=4, Average=32
Gain=8, Average=32
Gain=16, Average=32
Gain=32, Average=32
Gain=64, Average=32
TBD
12.3
12.7
8.4
8.7
13.3
13.1
12.5
11.8
11.1
10.2
9.3
—
bits
16-bit
differential
mode,
fin=500Hz
SINAD
Signal-to-noise
plus distortion
ratio
See ENOB
6.02 × ENOB + 1.76
dB
1. Typical values assume VDDA =3.0V, Temp=25°C, fADCK=6MHz unless otherwise stated.
2. Between IN+ and IN-. The PGA draws a DC current from the input terminals. The magnitude of the DC current is a strong
function if input common mode voltage (VCM) and the PGA gain.
3. This is the input leakage current of the module in addition to the PAD leakage current.
4. Gain = 2PGAG
5. When the PGA gain is changed, it takes some time to settle the output for the ADC to work properly. During a gain
switching, a few ADC outputs should be discarded (minimum two data samples, may be more depending on ADC
sampling rate and time of the switching).
6. Limit the input signal swing so that the PGA does not saturate during operation. Input signal swing is dependent on the
PGA reference voltage and gain setting.
6.6.2 CMP and 6-bit DAC electrical specifications
Table 28. Comparator and 6-bit DAC electrical specifications
Symbol
Description
Min.
Typ.
Max.
Unit
VDD
Supply voltage
1.71
—
3.6
V
IDDHS
Supply current, High-speed mode (EN=1, PMODE=1)
—
200
μA
IDDLS
Supply current, low-speed mode (EN=1, PMODE=0)
—
20
μA
VAIN
Analog input voltage
VSS – 0.3
—
VDD
V
VAIO
Analog input offset voltage
—
20
mV
Table continues on the next page...
Peripheral operating requirements and behaviors
K20 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
41
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| MK20X256VLL100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
| MK20X256VLQ100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
| MK20X256VMB100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
| MK20X256VMC100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
| MK20X256VMD100 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz |
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