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參數(shù)資料
| 型號(hào)： | MK2042-01SITR |
| 元件分類： | 標(biāo)準(zhǔn)邏輯 |
| 英文描述： | SPECIALTY LOGIC CIRCUIT, PDSO16 |
| 封裝： | 0.150 INCH, SOIC-16 |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大小： | 103K |
| 代理商： | MK2042-01SITR |
MDS 2042-01 B
1
Revision 080103
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 295-9800 ●
www.icst.com
COMMUNICATIONS CLOCK MONITOR
MK2042-01
EOL - DEVICE NOT RECOMMENDED FOR NEW DESIGNS
Description
The MK2042-01 is designed to switch between two
clock sources. The switching can be externally
controlled by an input pin or configured to switch
automatically if the primary input clock stops. The part
also provides clock detection by reporting when the
primary input clock has stopped.
The MK2042-01 is optimized for use with our MK2049
family of Communication Clock Synthesizers. When
used together, the MK2042-01 and MK2049 provide a
complete system for switching to an alternate source
when the primary clock is lost, or for maintaining a
stable frequency on the MK2049 output.
Features
Packaged in 16 pin SOIC
User controlled or automatic switching
Clock detect feature
Does not add jitter or phase noise to the clock
Ideal for systems with backup or redundant clocks
Selectable timeouts for clock loss detection
Accepts input frequencies from 0 to 160 MHz
Works with all MK2049-xx parts to provide enhanced
operation
Operating voltage of 3.3 or 5V
Device not recommended for new designs. Please
contact ICS for replacement options.
Block Diagram
S2:S0
Clock Loss
Detector
INB
OE
CENTER
SELB
VDD
INA
CLKOUT
NO_INA
HIGH
LOW
GND
3
REFIN
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK2302S-01T | 2302 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| MK2302SI-01 | 2302 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| MK2302S-01 | 2302 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| MK2302SI-01LFT | 2302 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| MK2304S-2LFT | 2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK2049-01 | 制造商:ICS 制造商全稱:ICS 功能描述:Communications Clock PLL |
| MK2049-01S | 制造商:Integrated Device Technology Inc 功能描述:IC SM CLK GEN T1/E1/T3/E3 PLL 8KHZ P-SO- - Bulk |
| MK2049-01SI | 制造商:ICS 制造商全稱:ICS 功能描述:Communications Clock PLL |
| MK2049-01SITR | 制造商:ICS 制造商全稱:ICS 功能描述:Communications Clock PLL |
| MK2049-01STR | 制造商:Integrated Device Technology Inc 功能描述:PLL CLOCK SYNTHESIZER SGL 20SOIC - Tape and Reel |
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