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參數(shù)資料
| 型號： | MK1581-01GILFTR |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 7/11頁 |
| 文件大小： | 0K |
| 描述： | IC CLK GENERATOR T1/E1 16-TSSOP |
| 標準包裝： | 2,500 |
| 類型： | 時鐘發(fā)生器 |
| PLL： | 無 |
| 輸入： | 時鐘，晶體 |
| 輸出： | CMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:1 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 2.048MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
MK1581-01
LOW PHASE NOISE T1/E1 CLOCK GENERATOR
VCXO AND SYNTHESIZER
IDT LOW PHASE NOISE T1/E1 CLOCK GENERATOR
5
MK1581-01
REV F 051310
A “normalized” PLL loop bandwidth may be calculated as
follows:
The “normalized” bandwidth (NBW) equation above does
not take into account the effects of damping factor or the
second pole. NBW is approximately equal to the actual -3dB
bandwidth of the loop when the damping factor is about 5
and C2 is very small. In most applications, NBW is about
75% of the actual -3dB bandwidth. However, NBW does
provide a useful approximation of filter performance.
The loop damping factor is calculated as follows:
Where:
RS = Value of resistor in loop filter (Ohms)
ICP = Charge pump current (amps)
(refer to Charge Pump Current Table, below)
N = Crystal multiplier shown in the above table
CS = Value of capacitor CS in loop filter (Farads)
As a general rule, the following relationship should be
maintained between components CS and CP in the loop
filter:
Charge Pump Current Table
Special considerations must be made in choosing loop
components CS and CP.
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50
trace (a commonly
used trace impedance), place a 33
resistor in series with
the clock line, as close to the clock output pin as possible.
The nominal impedance of the clock output is 20
. (The
optional series termination resistor is not shown in the
External Component Schematic.)
Decoupling Capacitors
As with any high performance mixed-signal IC, the
MK1581-01 must be isolated from system power supply
noise to perform optimally.
Decoupling capacitors of 0.01F must be connected
between each VDD and the PCB ground plane. To further
guard against interfering system supply noise, the
MK1581-01 should use one common connection to the PCB
power plane as shown in the diagram on the next page. The
ferrite bead and bulk capacitor help reduce lower frequency
noise in the supply that can lead to output clock phase
modulation.
NBW
RS ICP
×
575
×
N
-----------------------------------------
=
Damping Factor
RS
625
I
CP
×
CS
×
N
-------------------------------------------
×
=
CP
CS
20
------
=
RSET
Charge Pump Current
(ICP)
1.4 M
10
A
680 k
20
A
540 k
25
A
120 k
100
A
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| MK1581-01GITR | 功能描述:IC CLK GENERATOR T1/E1 16-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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| MK15-B-0 | 制造商:MEDER 制造商全稱:Meder Electronic 功能描述:MK Reed Sensors |
| MK15-B-0_DE | 制造商:MEDER 制造商全稱:Meder Electronic 功能描述:(deutsch) MK Reed Sensor |
| MK15-B-1 | 功能描述:近程傳感器 1 Form A Flat Leads Slot Mount AT 1015 RoHS:否 制造商:Vishay Semiconductors 感應(yīng)方式:Optical 感應(yīng)距離:1 mm to 200 mm 電源電壓:2.5 V to 3.6 V 安裝風格:SMD/SMT 輸出配置:Digital 最大工作溫度:+ 85 C 最小工作溫度:- 25 C 系列:VCNL3020 |
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