參數(shù)資料
型號: MK10DN512ZVMC10
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA121
封裝: 8 X 8 MM, MAPBGA-121
文件頁數(shù): 29/70頁
文件大?。?/td> 998K
代理商: MK10DN512ZVMC10
The bytes not assigned to data flash via the FlexNVM partition code are used by the
FTFL to obtain an effective endurance increase for the EEPROM data. The built-in
EEPROM record management system raises the number of program/erase cycles that can
be attained prior to device wear-out by cycling the EEPROM data through a larger
EEPROM NVM storage space.
While different partitions of the FlexNVM are available, the intention is that a single
choice for the FlexNVM partition code and EEPROM data set size is used throughout the
entire lifetime of a given application. The EEPROM endurance equation and graph
shown below assume that only one configuration is ever used.
Writes_subsystem =
× Write_efficiency × n
EEPROM – 2 × EEESPLIT × EEESIZE
EEESPLIT × EEESIZE
nvmcycd
where
Writes_subsystem — minimum number of writes to each FlexRAM location for
subsystem (each subsystem can have different endurance)
EEPROM — allocated FlexNVM for each EEPROM subsystem based on DEPART;
entered with Program Partition command
EEESPLIT — FlexRAM split factor for subsystem; entered with the Program
Partition command
EEESIZE — allocated FlexRAM based on DEPART; entered with Program Partition
command
Write_efficiency —
0.25 for 8-bit writes to FlexRAM
0.50 for 16-bit or 32-bit writes to FlexRAM
nnvmcycd — data flash cycling endurance
Peripheral operating requirements and behaviors
K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
Freescale Semiconductor, Inc.
Preliminary
35
相關PDF資料
PDF描述
MK10DN512ZVMC10R 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA121
MK1491-06R 49.152 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
MK1491-06RTR 49.152 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
MK1491-06STR 49.152 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
MK1493-14GLF 100 MHz, OTHER CLOCK GENERATOR, PDSO28
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