參數(shù)資料
型號: MIC841LBC5
廠商: MICREL INC
元件分類: 運動控制電子
英文描述: Comparator with Reference
中文描述: COMPARATOR, 12000 ns RESPONSE TIME, PDSO5
封裝: SC-70, 5 PIN
文件頁數(shù): 3/8頁
文件大?。?/td> 62K
代理商: MIC841LBC5
September 2004
3
MIC841/2
MIC841/2
Pin Configuration
Micrel
HTH
VDD
OUT
LTH
1
3
4
5
2
GND
Bxx
MIC841
SC-70-5 (C5)
INP
VDD
OUT
NC
1
3
4
5
2
GND
Bxx
MIC842
SC-70-5 (C5)
Pin Description MIC841
Pin Number
Pin Name
Pin Function
1
HTH
High-Voltage Threshold (Input): Analog input to a comparator. This is the
voltage input assigned to detect a high-voltage condition. When the level on
this pin exceeds V
REF
, OUT is asserted and the condition is latched until
V
LTH
< V
REF
.
Ground.
2
GND
3
LTH
Low-Voltage Threshold (Input): Analog input to a comparator. This is the
voltage input assigned to detect a low voltage condition. When the level on
this pin falls below V
REF
, OUT is de-asserted and the condition is latched
until V
HTH
> V
REF
.
Output: Active-high, open-drain output. This output is de-asserted and
latched when V
LTH
<V
REF
, indicating a low voltage condition. This state
remains latched until V
HTH
> V
REF
.
Output: Push-pull output. This output is de-asserted and latched when V
LTH
< V
REF
, indicating a low voltage condition. This state remains latched until
V
HTH
> V
REF
.
Output: Push-pull output. This output is asserted and latched when
V
LTH
< V
REF
, indicating a low voltage condition. This state remains latched
until V
HTH
> V
REF
.
Power Supply (Input): Independent supply input for internal circuitry.
4
OUT (
N
Version)
OUT (
H
Version)
OUT (
L
Version)
5
V
DD
Pin Description MIC842
Pin Number
Pin Name
Pin Function
1
INP
Input: Analog input to the comparator. When V
INP
> V
REF
+ V
HYST
, V
OUT
is
asserted, and the condition is held until V
INP
< V
REF
.
Ground.
2
GND
3
NC
No Connect.
4
OUT (
N
Version)
Output: Active-high, open-drain output. This output is de-asserted when
V
INP
< V
REF
, indicating a low voltage input. The output is asserted when
V
INP
> V
REF
+ V
HYST
.
Output: Push-pull output. This output is de-asserted and latched when
V
INP
< V
REF
, indicating a low voltage condition. This state remains latched
until V
INP
> V
REF
+ V
HYST
.
Output: Push-pull output. This output is asserted and latched when
V
INP
< V
REF
, indicating a low voltage condition. This state remains latched
until V
INP
> V
REF
+ V
HYST
.
Power Supply (Input): Independent supply input for internal circuitry.
OUT (
H
Version)
OUT (
L
Version)
5
V
DD
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