參數(shù)資料
型號(hào)： MIC5891
廠商： Micrel Semiconductor,Inc.
英文描述： 8-Bit Serial-Input Latched Source Driver
中文描述： 8位串行輸入鎖存源極驅(qū)動(dòng)器
文件頁(yè)數(shù)： 3/4頁(yè)
文件大小： 55K
代理商： MIC5891
7-56
December 1997
MIC5891
Micrel
Electrical Characteristics
V
BB
= 50V, V
DD
= 5V to 12V; T
A
= +25
°
C; unless noted.
Limits
Characteristic
Output Leakage Current
Symbol
I
CEX
V
BB
50V
Test Conditions
T
A
= +25
°
C
T
A
= +85
°
C
I
OUT
= –100mA, T
A
= +85
°
C
I
OUT
= –225mA, T
A
= +85
°
C
I
OUT
= –350mA, T
A
= +85
°
C
I
OUT
= –350mA, L = 2mH
V
DD
= 5.0V
V
DD
= 12V
V
DD
= 5V to 12V
V
DD
= V
IN
= 5.0V
V
DD
= 12V
V
DD
= 5.0V
V
DD
= 12V
Min.
Max.
–50
–100
1.8
1.9
2.0
Units
μ
A
μ
A
V
V
V
V
V
V
V
μ
A
μ
A
k
k
MHz
k
k
μ
s
μ
s
mA
μ
A
μ
A
μ
A
mA
mA
μ
A
μ
A
V
Output Saturation Voltage
V
CE(SAT)
50V
Output Sustaining Voltage
Input Voltage
V
CE(SUS)
V
IN(1)
50V
50V
35
3.5
10.5
V
SS
–0.3
V
DD
+0.3
V
DD
+0.3
0.8
50
240
V
IN(0)
I
IN(1)
50V
50V
Input Current
Input Impedance
Z
IN
50V
100
50
3.3
Maximum Clock Frequency
Serial Data Output Resistance
f
c
R
OUT
50V
50V
V
DD
= 5.0V
V
DD
= 12V
Output Enable to Output, I
OUT
= –350mA
Output Enable to Output, I
OUT
= –350mA
all outputs on, all outputs open
all outputs off
V
DD
= 5V, all outputs off, inputs = 0V
V
DD
= 12V, all outputs off, inputs = 0V
V
DD
= 5V, one output on, all inputs = 0V
V
DD
= 12V, one output on, all inputs = 0V
T
A
= +25
°
C
T
A
= +85
°
C
I
F
= 350mA
20
6.0
2.0
10
10
200
100
200
1.0
3.0
50
100
2.0
Turn-On Delay
Turnoff Delay
Supply Current
t
PLH
t
PHL
I
BB
50V
50V
50V
I
DD
50V
Diode Leakage Current
I
H
Max
Diode Forward Voltage
V
F
Open
Note 4:
Positive (negative) current is defined as going into (coming out of) the specified device pin.
Note 5:
Operation of these devices with standard TTL may require the use of appropriate pull-up resistors.
Timing Conditions
(V
DD
= 5.0V, Logic Levels are V
DD
and Ground)
A.
Minimum data active time before clock pulse (data set-up time) ........................................................................75ns
B.
Minimum data active time after clock pulse (data hold time) ..............................................................................75ns
C.
Minimum data pulse width.................................................................................................................................150ns
D.
Minimum clock pulse width ...............................................................................................................................150ns
E.
Minimum time between clock activation and strobe..........................................................................................300ns
F.
Minimum strobe pulse width..............................................................................................................................100ns
G.
Typical time between strobe activation and output transition.............................................................................1.0
μ
s
H.
Turnoff delay ................................................................................................................ see Electrical Characteristics
I.
Turn-on delay ............................................................................................................... see Electrical Characteristics
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