
Micrel, Inc.
MIC5311
Functional Description
The MIC5311 is a high performance, low quiescent
current power management IC consisting of two μCap
low dropout regulators with a LowQ mode featuring
lower operating current. Both regulators are capable of
sourcing 300mA.
February 2005
9
M9999-021105
(408) 955-1690
Enable 1 and 2
The enable inputs allow for logic control of both output
voltages with individual enable inputs. The enable input
is active high, requiring 1.0V for guaranteed operation.
The enable input is CMOS logic and cannot be left
floating.
LowQ
Mode
The LowQ pin is logic level low, requiring <0.2V to
enter the LowQ mode. The LowQ pin cannot be left
floating. Features of the LowQ mode include lower
total quiescent current of typically 7uA.
Input Capacitor
Good bypassing is recommended from input to ground
to help improve AC performance. A 1μF capacitor or
greater located close to the IC is recommended. Larger
load currents may require larger capacitor values.
Bypass Capacitor
The internal reference voltage of the MIC5311 can be
bypassed with a capacitor to ground to reduce output
noise and increase input ripple rejection (PSRR). A
quick-start feature allows for quick turn-on of the output
voltage. The recommended nominal bypass capacitor is
0.01μF, but an increase will result in longer turn on
times t
on
.
Output Capacitor
Each regulator output requires a 2.2μF ceramic output
capacitor for stability. The output capacitor value can be
increased
to
improve
performance has been optimized for a 2.2μF ceramic
type output capacitor. X7R/X5R dielectric-type ceramic
capacitors
are
recommended
temperature performance. X7R-type capacitors change
capacitance by 15% over their operating temperature
range and are the most stable type of ceramic
capacitors. Z5U and Y5V dielectric capacitors change
value by as much as 50% to 60% respectively over their
operating temperature ranges. To use a ceramic chip
capacitor with Y5V dielectric, the value must be much
higher than a X7R ceramic capacitor to ensure the same
minimum capacitance over the equivalent operating
temperature range.
transient
response,
but
because
of
their
Thermal Considerations
The MIC5311 is designed to provide 300mA of
continuous current per channel in a very small MLF
package. Maximum power dissipation can be calculated
based on the output current and the voltage drop across
the part. To determine the maximum power dissipation
of the package, use the junction-to-ambient thermal
resistance of the device and the following basic
equation:
P
D
(max) = (T
J
(max) - T
A
) /
θ
JA
T
J
(max) is the maximum junction temperature of the
die, 125°C, and T
A
is the ambient operating
temperature.
θ
JA
is layout dependent; Table 1 shows
examples of the junction-to-ambient thermal resistance
for the MIC5311.
Table 1. MLF Thermal Resistance
The actual power dissipation of the regulator circuit can
be determined using the equation:
P
DTOTAL
= P
D LDO1
+ P
D LDO2
P
D
LDO1
= (V
IN
-V
OUT1
) x I
OUT1
P
D
LDO2
= (V
IN
-V
OUT2
) x I
OUT2
Substituting P
D(max)
for P
D
and solving for the operating
conditions that are critical to the application will give the
maximum operating conditions for the regulator circuit.
For example, when operating the MIC5311 at 60°C with
a minimum footprint layout, the maximum load currents
can be calculated as follows:
P
D
(max) = (T
J
(max) - T
A
) /
θ
JA
P
D
(max) = (125°C - 60°C) / 63°C/W
P
D
(max) = 1.03W
The junction-to-ambient thermal resistance for the
minimum footprint is
63°C/W
, from Table 1. The
maximum power dissipation must not be exceeded for
proper operation. Using a lithium-ion battery as the
supply voltage of 4.2V, 1.8V
OUT
/150mA for channel 1
and 2.8V
OUT
/100mA for channel 2, power dissipation
can be calculated as follows:
P
D
LDO1
= (V
IN
-V
OUT1
) x I
OUT1
P
D
LDO1
= (4.2V-1.8V) x 150mA
P
D
LDO1
= 360mW
P
D
LDO2
= (V
IN
-V
OUT2
) x I
OUT2
P
D
LDO1
= (4.2V-2.8V) x 100mA
P
D
LDO1
= 140mW
Package
θ
JA
Recommended
Minimum Footprint
63°C/W
θ
JC
3x3 MLF-10
2°C/W