參數(shù)資料
型號(hào): MIC5252-2.8BML
廠商: MICREL INC
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: 150MA HIGH PSRR LOW NOISE UCAP CMOS LDO
中文描述: 2.8 V FIXED POSITIVE LDO REGULATOR, 0.25 V DROPOUT, DSO6
封裝: 2 X 2 MM, MLF-6
文件頁(yè)數(shù): 8/9頁(yè)
文件大?。?/td> 86K
代理商: MIC5252-2.8BML
MIC5252
Applications Information
Enable/Shutdown
The MIC5252 comes with an active-high enable pin that
allows the regulator to be disabled. Forcing the enable pin low
disables the regulator and sends it into a
zero
off-mode-
current state. In this state, current consumed by the regulator
goes nearly to zero. Forcing the enable pin high enables the
output voltage. This part is CMOS and the enable pin cannot
be left floating; a floating enable pin may cause an indetermi-
nate state on the output.
Input Capacitor
The MIC5252 is a high performance, high bandwidth device.
Therefore, it requires a well-bypassed input supply for opti-
mal performance. A 1
μ
F capacitor is required from the input
to ground to provide stability. Low-ESR ceramic capacitors
provide optimal performance at a minimum of space. Addi-
tional high-frequency capacitors, such as small valued NPO
dielectric type capacitors, help filter out high frequency noise
and are good practice in any RF based circuit.
Output Capacitor
The MIC5252 requires an output capacitor for stability. The
design requires 1
μ
F or greater on the output to maintain
stability. The design is optimized for use with low-ESR
ceramic chip capacitors. High ESR capacitors may cause
high frequency oscillation. The maximum recommended
ESR is 300m
. The output capacitor can be increased, but
performance has been optimized for a 1
μ
F ceramic output
capacitor and does not improve significantly with larger
capacitance.
X7R/X5R dielectric-type ceramic capacitors are recom-
mended because of their temperature performance. X7R-
type capacitors change capacitance by 15% over their oper-
ating temperature range and are the most stable type of
ceramic capacitors. Z5U and Y5V dielectric capacitors change
value by as much as 50% and 60%, respectively, over their
operating temperature ranges. To use a ceramic chip capaci-
tor with Y5V dielectric, the value must be much higher than an
X7R ceramic capacitor to ensure the same minimum capaci-
tance over the equivalent operating temperature range.
Bypass Capacitor
A capacitor is required from the noise bypass pin to ground
to reduce output voltage noise. The capacitor bypasses the
internal reference. A 0.01
μ
F capacitor is recommended for
applications that require low-noise outputs. The bypass ca-
pacitor can be increased, further reducing noise and improv-
ing PSRR. Turn-on time increases slightly with respect to
bypass capacitance. A unique quick-start circuit allows the
MIC5252 to drive a large capacitor on the bypass pin without
significantly slowing turn-on time. Refer to the
Typical Char-
acteristics
section for performance with different bypass
capacitors.
Active Shutdown
The MIC5252 also features an active shutdown clamp, which
is an N-Channel MOSFET that turns on when the device is
disabled. This allows the output capacitor and load to dis-
charge, de-energizing the load.
Micrel
M0394-121003
8
December 2003
No-Load Stability
The MIC5252 will remain stable and in regulation with no load
unlike many other voltage regulators. This is especially
important in CMOS RAM keep-alive applications.
Thermal Considerations
The MIC5252 is designed to provide 150mA of continuous
current in a very small package. Maximum power dissipation
can be calculated based on the output current and the voltage
drop across the part. To determine the maximum power
dissipation of the package, use the junction-to-ambient ther-
mal resistance of the device and the following basic equation:
P (max)
T (max)
T
A
JA
=
θ
T
J
(max) is the maximum junction temperature of the die,
125
°
C, and T
A
is the ambient operating temperature.
θ
JA
is
layout dependent; Table 1 shows examples of junction-to-
ambient thermal resistance for the MIC5252.
Package
θ
JA
Recommended
Minimum Footprint
θ
JA
1" Square
Copper Clad
θ
JC
SOT-23-5
(M5 or D5)
235
°
C/W
185
°
C/W
145
°
C/W
Table 1. SOT-23-5 Thermal Resistance
The actual power dissipation of the regulator circuit can be
determined using the equation:
P
D
= (V
IN
V
OUT
) I
OUT
+ V
IN
I
GND
Substituting P
D
(max) for P
D
and solving for the operating
conditions that are critical to the application will give the
maximum operating conditions for the regulator circuit. For
example, when operating the MIC5252-2.8BM5 at 50
°
C with
a minimum footprint layout, the maximum input voltage for a
set output current can be determined as follows:
P (max)
125 C
235 C/W
50 C
=
P
D
(max) = 315mW
The junction-to-ambient thermal resistance for the minimum
footprint is 235
°
C/W, from Table 1. The maximum power
dissipation must not be exceeded for proper operation. Using
the output voltage of 2.8V and an output current of 150mA,
the maximum input voltage can be determined. Because this
device is CMOS and the ground current is typically 100
μ
A
over the load range, the power dissipation contributed by the
ground current is < 1% and can be ignored for this calculation.
315mW = (V
IN
2.8V) 150mA
315mW = V
IN
×
150mA
420mW
735mW = V
IN
×
150mA
V
IN
(max) = 4.9V
Therefore, a 2.8V application at 150mA of output current can
accept a maximum input voltage of 4.9V in a SOT-23-5
package. For a full discussion of heat sinking and thermal
effects on voltage regulators, refer to the
Reguator Thermas
section of Micrel
s Designing with Low-Dropout Voltage Regu-
lators handbook.
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