參數(shù)資料
型號(hào): MIC2755BMM
廠商: MICREL INC
元件分類: 電源管理
英文描述: Battery System Supervisor Preliminary Information
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝: MSOP-8
文件頁(yè)數(shù): 5/12頁(yè)
文件大?。?/td> 79K
代理商: MIC2755BMM
February 2000
5
MIC2755
MIC2755
Functional Description
Typically the MIC2755 is used to monitor the battery supply
of intelligent circuits such as microcontrollers and micropro-
cessors. By connecting the reset output of a MIC2755 to the
reset input of a
μ
C or
μ
P, the processor will be properly reset
at power-on and during power-down and low battery condi-
tions. The /NMI output provides low-battery warnings to the
system. In addition, a system whose battery voltage declines
below the PTH threshold is held in reset to prevent spurious
operation. Thus the MIC2755 effectively detects three battery
states:
battery OK,
low battery,
and
dead battery.
Reset Output
/RST is an active-low, open-drain digital output. This output
is asserted for a minimum of 700ms at power-on and for a
minimum of 175ms when RTH(/MR) is externally pulled low,
indicating that a manual reset should be initiated. /RST is an
active-low, open-drain digital output and may be wire-ORed
with other open-drain logic signals. Most applications will
require a pull-up resistor on this pin. /RST may be pulled up
to any voltage not exceeding V
/RST(max)
even if this voltage is
higher than V
DD
(see
Electrical Characteristics
).
Nonmaskable Interrupt Output
/NMI is the output of a comparator that constantly compares
the level on the NTH pin with the internal voltage reference,
V
REF2
. This output is asserted when V
NTH
< V
REF2
, indicating
high-power system operation should not occur; that is, the
battery is low but not dead. Effectively, this function is an
uncommitted comparator with its inverting input connected to
the internal reference, V
REF2
, its noninverting input con-
nected to NTH, and its output on /NMI. This comparator does
not affect any other MIC2755 functions and may be used
independently.
/NMI is an active-low, open-drain digital output and may be
wire-ORed with other open-drain logic signals. Most applica-
tions will require a pull-up resistor on this pin. /NMI may be
pulled up to any voltage not exceeding V
/NMI(max)
even if this
voltage is higher than V
DD
(see
Electrical Characteristics
).
Micrel
Power-Off Output
This output and the /RST output are asserted and latched
when V
PTH
< V
REF
, indicating a
dead battery.
The system
is held in reset until the battery is replaced or recharged and
a power-on reset cycle occurs; that is, V
RTH
> V
REF1
. The
/POF output may be used to control a linear or switching
regulator, shutting down the regulator when the battery
reaches it end-of-life voltage.
/POF is an active-low, open-drain digital output and may be
wire-ORed with other open-drain logic signals. Most applica-
tions will require a pull-up resistor on this output. /POF may
be pulled up to any voltage not exceeding V
/POF(max)
even if
this voltage is higher than V
DD
(see
Electrical Characteris-
tics
).
Power-On Reset
The RTH(/MR) and PTH inputs work together to provide
predictable battery monitoring with user-programmable hys-
teresis and without chatter. The /RST output is asserted for
a minimum of 700ms at power-on. Power-on is determined by
RTH(/MR) exceeding V
REF1
. Once this event has occurred,
the internal logic ignores further transitions on the RTH(/MR)
input, instead monitoring for a low voltage on PTH or the
manual reset condition. If V
PTH
drops below V
REF1
, the /POF
and /RST outputs are asserted and latched, holding the
system in its reset state.
Manual Reset
An internal circuit monitors RTH(/MR), comparing it to an
internal 310mV reference, V
/MRTV
. When RTH(/MR) is pulled
below V
/MRTV,
and V
PTH
is still above V
REF1
, the internal
circuitry initiates a manual reset cycle and asserts /RST for at
least 175ms. A momentary push-button switch is typically
connected such that RTH(/MR) is forced to ground when the
switch contacts close. This switch is internally debounced.
Each closure of the switch longer than t
DBNC
results in a
single output pulse of no less than 175ms and no more than
300ms being generated. (The manual reset pulse is derived
from the same oscillator and counter as t
/RST
. The length of
t
/MR
is always equal to one fourth of t
/RST
.) This prevents a
user who may hold the switch closed from keeping the system
in reset for an extended period of time.
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