參數(shù)資料
型號(hào): MIC2592B-2BTQ
廠商: MICREL INC
元件分類: 電源管理
英文描述: Dual-Slot PCI Express Hot-Plug Controller
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP48
封裝: TQFP-48
文件頁(yè)數(shù): 22/31頁(yè)
文件大小: 1916K
代理商: MIC2592B-2BTQ
MIC2592B
Detailed Register Descriptions
Control Register, Slot A (CNTRLA)
8-Bits, Read/Write
Micrel
March 2005
22
M9999-033105
Control Register, Slot A (CNTRLA)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
read-only
read-only
read only
read only
read-only
read/write
read/write
read/write
ENABLE
MAINA
VAUXA
Bit(s)
Function
Operation
(VAUXA Output is above its UVLO threshold)
thresholds)
D[5]
Reserved
Always read as zero
D[4]
Reserved
Always read as zero
D[3]
Reserved
Always read as zero
ENABLE
input pin
1 = /FORCE_ONA is disabled
MAINA
MAIN enable control, Slot A
0 = Off, 1 = On
VAUXA
VAUX enable control, Slot A
0 = Off, 1 = On
Power-Up Default Value:
Read Command_Byte Value (R/W):
0000 0000b = 00h
0000 0010b = 02h
The power-up default value is 00h. Slot is disabled upon power-up, i.e., all supply outputs are off.
Notes:
1.
The state of the /PWRGDA pin is the logical AND of the values of the AUXAPG and the MAINAPG bits, except when /FORCE_ONA is asserted. If
/FORCE_ONA is asserted (the pin is pulled low), and /FORCE_AENABLE is set to a logic zero, the /PWRGDA pin will be unconditionally forced to
its open-drain (“Power Not Good”) state.
AUXAPG
AUX output power-good status, Slot A
1 = Power-is-Good
(MAINA Outputs are above their UVLO
/FORCE_A Allows or inhibits the operation of the /FORCE_ONA
0 = /FORCE_ONA is enabled
MAINAPG
MAIN output power-good status, Slot A
1 = Power-is-Good
AUXAPG
MAINAPG
Reserved
Reserved
Reserved
/FORCE_A
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