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參數(shù)資料
| 型號： | MIC2206 |
| 廠商： | Micrel Semiconductor,Inc. |
| 英文描述： | 2MHz PWM Synchronous Buck Regulator with LOWQ Mode and Voltage Scaling |
| 中文描述： | 2MHz的PWM同步降壓穩(wěn)壓器具有LOWQ模式和電壓縮放 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 608K |
| 代理商： | MIC2206 |
Micrel
MIC2206
Functional Description
VIN
VIN provides power to the MOSFETs for the switch
mode regulator section, along with the current
limiting sensing. Due to the high switching speeds, a
1
μ
F capacitor is recommended close to VIN and the
power ground (PGND) pin for bypassing.
AVIN
Analog V
IN
(AVIN) provides power to the LDO
section and the bias through an internal 6 Ohm
resistor. AVIN and VIN must be tied together.
Careful layout should be considered to ensure high
frequency switching noise caused by VIN is reduced
before reaching AVIN.
LDO
The LDO pin is the output of the linear regulator and
should be connected to the output. In LOWQ mode
(LOWQ<1.5V), the LDO provides the output voltage.
In PWM mode (LOWQ>1.5V) the LDO pin is high
impedance.
EN
The enable pin provides a logic level control of the
output. In the off state, supply current of the device
is greatly reduced (typically <1
μ
A). Also, in the off
state, the output drive is placed in a "tri-stated"
condition, where both the high side P-channel
Mosfet and the low-side N-channel are in an off or
non-conducting state. Do not drive the enable pin
above the supply voltage.
LOWQ
The LOWQ pin provides a logic level control
between the internal PWM mode and the low noise
linear regulator mode. With LOWQ pulled low
(<0.5V), quiescent current of the device is greatly
reduced by switching to a low noise linear regulator
mode that has a typical I
Q
of 18
μ
A. In linear (LDO)
mode the output can deliver 60mA of current at 1.0V
to the output. By placing LOWQ high (>1.5V) , this
transitions the device into a constant frequency
PWM buck regulator mode. This allows the device
the ability to efficiently deliver up to 600mA of output
current at the same output voltage.
BIAS
The BIAS pin supplies the power to the internal
power to the control and reference circuitry. The bias
is powered from AVIN through an internal 6
resistor. A small 0.1
μ
F capacitor is recommended
for bypassing.
FB
The feedback pin (FB) provides the connection to
the internal FB resistor divider. Place a small 100pF
ceramic capacitor between FB and the output
voltage.
SW
The switch (SW) pin connects directly to the inductor
and provides the switching current nessasary to
operate in PWM mode. Due to the high speed
switching on this pin, the switch node should be
routed away from sensitive nodes.
PGND
Power ground (PGND) is the ground path for the
high current PWM mode. The current loop for the
power ground should be as small as possible and
separate from the Analog ground (AGND) loop.
Refer to the layout considerations fro more details.
SGND
Signal ground (SGND) is the ground path for the
biasing and control circuitry. The current loop for the
signal ground should be separate from the Power
ground
(PGND)
loop.
considerations for more details.
Refer
to
the
layout
April 2005
9
M9999-041905
www.micrel.com
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