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參數(shù)資料
| 型號(hào)： | MIC2202BMM |
| 廠商： | MICREL INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | HIGH EFFICIENCY 2MHZ SYNCHRONOUS BUCK CONVERTER 1UP STABLE PWM REGULATOR |
| 中文描述： | 2.5 A SWITCHING REGULATOR, 2200 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封裝： | MSOP-10 |
| 文件頁(yè)數(shù)： | 7/18頁(yè) |
| 文件大小： | 182K |
| 代理商： | MIC2202BMM |
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May 2004
7
M9999-052104
MIC2202
Micrel
Applications Information
Input Capacitor
A minimum 1
μ
F ceramic is recommended on the V
IN
pin for
bypassing. X5R or X7R dielectrics are recommended for the
input capacitor. Y5V dielectrics, aside from losing most of
their capacitance over temperature, they also become resis-
tive at high frequencies. This reduces their ability to filter out
high frequency noise.
Output Capacitor
The MIC2202 was designed specifically for the use of a 1
μ
F
ceramic output capacitor. This value can be increased to
improve transient performance. Since the MIC2202 is volt-
age mode, the control loop relies on the inductor and output
capacitor for compensation. For this reason, do not use
excessively large output capacitors. The output capacitor
requires either an X7R or X5R dielectric. Y5V and Z5U
dielectric capacitors, aside from the undesirable effect of their
wide variation in capacitance over temperature, become
resistive at high frequencies. Using Y5V or Z5U capacitors
will cause instability in the MIC2202.
Total output capacitance should not exceed 15
μ
F. Large
values of capacitance can cause current limit to engage
during start-up. If larger than 15
μ
F is required, a feed-forward
capacitor from the output to the feedback node should be
used to slow the start up time.
Inductor Selection
Inductor selection will be determined by the following (not
necessarily in the order of importance):
Inductance
Rated current value
Size requirements
DC resistance (DCR)
The MIC2202 is designed for use with a 1
μ
H to 4.7
μ
H
inductor.
Maximum current ratings of the inductor are generally given
in two methods: permissible DC current and saturation cur-
rent. Permissible DC current can be rated either for a 40
°
C
temperature rise or a 10% loss in inductance. Ensure the
inductor selected can handle the maximum operating cur-
rent. When saturation current is specified, make sure that
there is enough margin that the peak current will not saturate
the inductor.
The size requirements refer to the area and height require-
ments that are necessary to fit a particular design. Please
refer to the inductor dimensions on their datasheet.
DC resistance is also important. While DCR is inversely
proportional to size, DCR can represent a significant effi-
ciency loss. Refer to the
“
Efficiency Considerations
”
below
for a more detailed description.
Bias Capacitor
A small 10nF ceramic capacitor is required to bypass the bias
pin. The use of low ESR ceramics provides improved filtering
for the bias supply.
Efficiency Considerations
Efficiency is defined as the amount of useful output power,
divided by the amount of power consumed.
Efficiency %
V
I
I
V
100
OUT
OUT
IN
IN
=
×
×
×
Maintaining high efficiency serves two purposes. It reduces
power dissipation in the power supply, reducing the need for
heat sinks and thermal design considerations and it reduces
consumption of current for battery powered applications.
Reduced current draw from a battery increases the devices
operating time, critical in hand held devices.
There are two loss terms in switching converters: DC losses
and switching losses. DC losses are simply the power dissi-
pation of I
2
R. Power is dissipated in the high side switch
during the on cycle. Power loss is equal to the high side
MOSFET RDS
(ON)
multiplied by the Switch Current
2
. During
the off cycle, the low side N-Channel MOSFET conducts, also
dissipating power. Device operating current also reduces
efficiency. The product of the quiescent (operating) current
and the supply voltage is another DC loss. The current
required to drive the gates on and off at a constant 2MHz
frequency and the switching transitions make up the switch-
ing losses.
Figure 2 shows an efficiency curve. The non-shaded portion,
from 0mA to 200mA, efficiency losses are dominated by
quiescent current losses, gate drive and transition losses. In
this case, lower supply voltages yield greater efficiency in that
they require less current to drive the MOSFETs and have
reduced input power consumption.
50
55
60
65
70
75
80
85
90
95
100
0
0.1
OUTPUT CURRENT (A)
Figure 2. Efficiency Curve
0.2
0.3
0.4
0.5
0.6
E
3.3V
OUT
4.2V
IN
5V
IN
Efficiency
vs. Output Current
The shaded region, 200mA to 500mA, efficiency loss is
dominated by MOSFET RDS
(ON)
and inductor DC losses.
Higher input supply voltages will increase the Gate-to-Source
threshold on the internal MOSFETs, reducing the internal
RDS
(ON)
. This improves efficiency by reducing DC losses in
the device. All but the inductor losses are inherent to the
device. In which case, inductor selection becomes increas-
ingly critical in efficiency calculations. As the inductors are
reduced in size, the DC resistance (DCR) can become quite
significant. The DCR losses can be calculated as follows;
L
I
DCR
PD
OUT
=
×
2
From that, the loss in efficiency due to inductor resistance can
be calculated as follows:
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