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參數(shù)資料
| 型號： | MIC2199BML |
| 廠商： | MICREL INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 300kHz 4mm 】 4mm Synchronous Buck Converter |
| 中文描述： | SWITCHING CONTROLLER, 330 kHz SWITCHING FREQ-MAX, PDSO12 |
| 封裝： | 4 X 4 MM, MLF-12 |
| 文件頁數(shù)： | 14/15頁 |
| 文件大小： | 222K |
| 代理商： | MIC2199BML |
MIC2199
Micrel
MIC2199
14
November 2004
Decoupling Capacitor Selection
The 4.7
μ
F decoupling capacitor is used to minimize noise on
the V
DD
pin. The placement of this capacitor is critical to the
proper operation of the IC. It must be placed right next to the
pins and routed with a wide trace. The capacitor should be a
good quality tantalum. An additional 1
μ
F ceramic capacitor
may be necessary when driving large MOSFETs with high
gate capacitance. Incorrect placement of the V
DD
decoupling
capacitor will cause jitter or oscillations in the switching
waveform and large variations in the overcurrent limit.
A 0.1
μ
F ceramic capacitor is required to decouple the V
IN
.
The capacitor should be placed near the IC and connected
directly to between pin 6 (V
IN
) and pin 9 (GND).
PCB Layout and Checklist
PCB layout is critical to achieve reliable, stable and efficient
performance. A ground plane is required to control EMI and
minimize the inductance in power, signal and return paths.
The following guidelines should be followed to insure proper
operation of the circuit.
Signal and power grounds should be kept separate
and connected at only one location. Large currents
or high di/dt signals that occur when the MOSFETs
turn on and off must be kept away from the small
signal connections.
The connection between the current-sense resis-
tor and the MIC2199 current-sense inputs (pin 4
and 5) should have separate traces, through a 10
resistor on each pin. The traces should be routed
as closely as possible to each other and their
length should be minimized. Avoid running the
traces under the inductor and other switching
components. The 10
resistor should be placed
close as possible to pins 4 and 5 on the MIC2199
and a 1nF to 0.1
μ
F capacitor placed between pins
4 and 5 will help attenuate switching noise on the
current sense traces. This capacitor should be
placed close to pins 4 and 5.
When the high-side MOSFET is switched on, the
critical flow of current is from the input capacitor
through the MOSFET, inductor, sense resistor,
output capacitor, and back to the input capacitor.
These paths must be made with short, wide pieces
of trace. It is good practice to locate the ground
terminals of the input and output capacitors close
to each.
When the low-side MOSFET is switched on, cur-
rent flows through the inductor, sense resistor,
output capacitor, and MOSFET. The source of the
low-side MOSFET should be located close to the
output capacitor.
The freewheeling diode, D1 in Figure 2, conducts
current during the dead time, when both MOSFETs
are off. The anode of the diode should be located
close to the output capacitor ground terminal and
the cathode should be located close to the input
side of the inductor.
The 4.7
μ
F capacitor, which connects to the V
DD
terminal (pin 7) must be located right at the IC. The
V
DD
terminal is very noise sensitive and placement
of this capacitor is very critical. Connections must
be made with wide trace. The capacitor may be
located on the bottom layer of the board and
connected to the IC with multiple vias.
The V
IN
bypass capacitor should be located close
to the IC and connected between pins 6 and 9.
Connections should be made with a ground and
power plane or with short, wide trace.
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