參數(shù)資料
型號: MIC1555BM5 TR
廠商: Micrel Inc
文件頁數(shù): 5/17頁
文件大?。?/td> 0K
描述: IC OSC MONO TIMING 5MHZ SOT23-5
標(biāo)準(zhǔn)包裝: 3,000
系列: IttyBitty®
類型: 555 型,計時器/振蕩器(單路)
頻率: 5MHz
電源電壓: 2.7 V ~ 18 V
電流 - 電源: 350µA
工作溫度: -40°C ~ 85°C
封裝/外殼: SC-74A,SOT-753
包裝: 帶卷 (TR)
供應(yīng)商設(shè)備封裝: SOT-23-5
安裝類型: 表面貼裝
其它名稱: MIC1555BM5TR
MIC1555BM5TR-ND
Micrel, Inc.
MIC1555/1557
March 11, 2014
13
Revision 6.0
Rising-Edge Triggered Monostable Circuit
The MIC1555 may be triggered by an AC-coupled rising-
edge, as shown in Figure 6. The pulse begins when the
ac-coupled input rises, and a diode from the output holds
the THR input low until TRG discharges to 1/3VS. This
circuit provides a low-going output pulse.
Figure 6. Rising Edge Trigger Configuration
Accuracy
The two comparators in the MIC1555/7 use a resistor
voltage divider to set the threshold and trigger trip points
to approximately 2/3 and 1/3 of the input voltage,
respectively. Since the charge and discharge rates of an
RC circuit are dependent on the applied voltage, the
timing remains constant if the input voltage varies. If a
duty cycle of exactly 50% (or any other value from 1 to
99%), two resistors (or a variable resistor) and two diodes
are needed to vary the charge and discharge times. The
forward voltage of diodes varies with temperature, so
some change in frequency will be seen with temperature
extremes, but the duty cycle should track. For absolute
timing accuracy, the MIC1555/7 output could be used to
control constant current sources to linearly charge and
discharge the capacitor, at the expense of added
components and board space.
Long Time Delays
Timing resistors larger than 1M or capacitors larger
than 10F are not recommended due to leakage current
inaccuracies. Time delays greater than 10 seconds are
more accurately produced by dividing the output of an
oscillator by a chain of flip-flop counter stages. To
produce an accurate one-hour delay, for example, divide
a 4.55Hz MIC1557 oscillator by 16,384 (4000hex, 214)
using a CD4020 CMOS divider. 4.5Hz may be generated
with a 1F CT and approximately 156k.
Inverting Schmitt Trigger
As shown in Figure 7, the trip points of the MIC1555/7
are defined as 1/3 and 2/3VS, which allows either device
to be used as a signal conditioning inverter, with
hysteresis. A slowly changing input on T/T will be
converted to a fast rise or fall-time opposite direction rail-
to-rail output voltage. This output maybe used to directly
drive the gate of a logic-level P-channel MOSFET with a
gate pull-up resistor. This is an inverted logic low-side
logic level MOSFET driver. A standard N-channel
MOSFET may be driven by a second MIC1555/7,
powered by 12V to 15V, to level-shift the input.
Figure 7. Schmitt Trigger
Charge-Pump Low-Side MOSFET Drivers
A standard MOSFET requires approximately >5V to fully
enhance the gate for minimum RDS(ON). Substituting a
logic-level MOSFET reduces the required gate voltage,
allowing an MIC1557 to be used as an inverting Schmitt
trigger, described above. An MIC1557 may be configured
as a voltage quadrupler to boost a 5V input to over 15V
to fully enhance an N-channel MOSFET which may have
its drain connected to a higher voltage, through a high-
side load. ATTL high signal applied to CS enables a
10kHz oscillator, which quickly develops 15V at the gate
of the MOSFET, clamped by a Zener diode. A resistor
from the gate to ground ensures that the FET will turn off
quickly when the MIC1557 is turned off.
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