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| 型號： | MH8S64DALD-7 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 536870912-BIT (8388608 - WORD BY 64-BIT)Synchronous DRAM |
| 中文描述： | 536870912位（8388608 -文字，64位）同步DRAM |
| 文件頁數(shù)： | 31/55頁 |
| 文件大小： | 588K |
| 代理商： | MH8S64DALD-7 |
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MH8S64PHC -7,-8,-10
536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( 31
MITSUBISHI
ELECTRIC
9/ Dec. /1998
Preliminary Spec.
Some contents are subject to change without notice.
MIT-DS-0282-0.0
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Condition
Ratings
Unit
Vdd
VI
VO
IO
Pd
Topr
Tstg
Supply Voltage
Input Voltage
Output Voltage
Output Current
Power Dissipation
Operating Temperature
Storage Temperature
with respect to Vss
with respect to Vss
with respect to Vss
Ta=25°C
-0.5 ~ 4.6
-0.5 ~ 4.6
50
4
0 ~ 70
-40 ~ 100
V
V
V
mA
W
°C
°C
RECOMMENDED OPERATING CONDITION
(Ta=0 ~ 70°C, unless otherwise noted)
Symbol
Vdd
Vss
VIH
VIL
Parameter
Supply Voltage
High-Level Input Voltage all inputs
Low-Level Input Voltage all inputs
Supply Voltage
Limits
Unit
Min.
3.0
0
2.0
-0.3
Typ.
3.3
0
Max.
3.6
0
Vdd+0.3
0.8
V
V
V
V
CAPACITANCE
(Ta=0 ~ 70°C, Vdd = 3.3 ± 0.3V, Vss = 0V, unless otherwise noted)
Parameter
Input Capacitance, address pin
Symbol
CI(A)
CI(C)
CI(K)
CI(S)
CI(E)
CI/O
Input Capacitance, /RAS,/CAS,/WE
Input Capacitance, CK pin
Input Capacitance, /CS pin
Input Capacitance, CKE pin
Input Capacitance, I/O pin
Test Condition
Limits(max.)
37
37
Unit
pF
pF
VI = Vss
f=1MHz
Vi=25mVrms
45
37
37
15
pF
pF
pF
-0.5 ~ 4.6
pF
CI(M)
Input Capacitance, DQM pin
15
pF
Note:* VIH (max) = 5.5V for pulse width less than 10ns.
VIL (min) = -1.0V for pulse width less than 10ns.
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