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參數(shù)資料
| 型號： | MH1S64CWXTJ-12 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Transceiver IC; Transceiver Type:Ethernet; Number of Drivers:6; Interface Type:MII; Supply Voltage Max:5V; Package/Case:100-TQFP; Leaded Process Compatible:Yes; Number of Channels:1; Operating Temp. Max:70 C |
| 中文描述： | 67108864位（1048576字，64位）SynchronousDRAM |
| 文件頁數(shù)： | 22/45頁 |
| 文件大小： | 683K |
| 代理商： | MH1S64CWXTJ-12 |
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MH1S64CWXTJ-12,-15,-1539
67108864-BIT (1048576-WORD BY 64-BIT)SynchronousDRAM
MITSUBISHI LSIs
( 22
MITSUBISHI
ELECTRIC
Oct.28.1996
Some contents are subject to change without notice.
MIT-DS-0064-0.2
[ Write Interrupted by Precharge ]
Burst write operation can be interrupted by precharge of the same bank. Random
column access is allowed. Because the write recovery time(tWR) is required between
the last input data and the next PRE, 3rd data should be masked with DQMB0-7
shown as below.
Write Interrupted by Precharge (BL=4)
CK
Command
A0-9
A10
BA
DQ
Write
Yi
0
0
PRE
0
0
Dai0
Dai1
DQMB0-7
ACT
Xb
Xb
0
tWR
tRP
This data should be masked to satisfy tWR requirement.
[ Write Interrupted by Burst Terminate ]
Burst terminate command can terminate burst write operation. In this case, the write
recovery time is not required and the bank remains active. The figure below shows
the case 3 words of data are written. Random column access is allowed. WRITE to
TERM interval is minimum 1 CK.
Write Interrupted by Burst Terminate (BL=4)
CK
Command
A0-9
A10
BA
DQ
Write
Yi
0
0
TERM
Dai0
Dai1
DQMB0-7
Dai2
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| MH1S64CWXTJ-15 | 67108864-BIT (1048576-WORD BY 64-BIT)SynchronousDRAM |
| MH1S64CWXTJ-1539 | 67108864-BIT (1048576-WORD BY 64-BIT)SynchronousDRAM |
| MH1S72CPG-10 | 75497472-BIT (1048576-WORD BY 72-BIT)SynchronousDRAM |
| MH1S72CPG-12 | 75497472-BIT (1048576-WORD BY 72-BIT)SynchronousDRAM |
| MH1S72CPG-15 | 75497472-BIT (1048576-WORD BY 72-BIT)SynchronousDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MH1S64CWXTJ-15 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:67108864-BIT (1048576-WORD BY 64-BIT)SynchronousDRAM |
| MH1S64CWXTJ-1539 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:67108864-BIT (1048576-WORD BY 64-BIT)SynchronousDRAM |
| MH1S72CPG-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:75497472-BIT (1048576-WORD BY 72-BIT)SynchronousDRAM |
| MH1S72CPG-12 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:75497472-BIT (1048576-WORD BY 72-BIT)SynchronousDRAM |
| MH1S72CPG-15 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:75497472-BIT (1048576-WORD BY 72-BIT)SynchronousDRAM |
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