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  • 參數(shù)資料
    型號(hào): MH16S72APHB-8
    廠商: Mitsubishi Electric Corporation
    英文描述: 1,207,959,552-BIT (16,777,216 - WORD BY 72-BIT)Synchronous DRAM
    中文描述: 1207959552位(16,777,216 - Word的72位)同步DRAM
    文件頁(yè)數(shù): 27/52頁(yè)
    文件大?。?/td> 1045K
    代理商: MH16S72APHB-8
    MH16S72AMA -8,-10,-12
    1207959552-BIT (16777216 - WORD BY 72-BIT)SynchronousDRAM
    MITSUBISHI LSIs
    ( 27
    MITSUBISHI
    ELECTRIC
    5. Mar.1997
    Preliminary Spec.
    Some contents are subject to change without notice.
    MIT-DS-0128-0.0
    CLK SUSPEND
    CKE controls the internal CLK at the following cycle. Figure below shows how CKE
    works. By negating CKE, the next internal CLK is suspended. The purpose of CLK
    suspend is power down, output suspend or input suspend. CKE is a synchronous
    input except during the self-refresh mode. CLK suspend can be performed either
    when the banks are active or idle, but a command at the following cycle is ignored.
    CK
    (ext.CLK)
    CKE
    int.CLK
    Power Down by CKE
    CK
    Command
    PRE
    CKE
    Command
    CKE
    ACT
    NOP
    NOP
    NOP
    NOP
    NOP
    NOP
    NOP
    NOP
    NOP
    NOP
    NOP
    NOP
    Standby Power Down
    Active Power Down
    NOP
    NOP
    DQ Suspend by CKE
    CK
    Command
    DQ
    Write
    D0
    D1
    D2
    D3
    CKE
    READ
    Q0
    Q1
    Q2
    Q3
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