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參數(shù)資料
| 型號： | MGCM02 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | TDMA/AMPS IF and Baseband Interface |
| 中文描述： | 時分多址/ AMPS二元IF和基帶接口 |
| 文件頁數(shù)： | 13/21頁 |
| 文件大?。?/td> | 529K |
| 代理商： | MGCM02 |
Data Sheet
MGCM02
13
The synthesisers include 2 modulus prescalers
programmable from 8/9 to 128/129 followed by a 11
bit programmable counter and 7 bit swallow counter
to control the 2 modulus prescaler. The reference
divider is a fully programmable 15 bit counter. The
reference frequency is a 19.44MHz TCXO.
The synthesiser charge pumps can be programmed
to four current levels to drive the appropriate loop
fi
lters.
The synthesisers also provide lock detect outputs.
There is also a lock detect input pin (E4) which can
be connected to the system UHF synthesiser and is
then gated with the MGCM02 lock detect to give a
combined lock detect output to the baseband
controller via Lock Detect output pin (C5). This logic
can use either the receive or transmit lock detect
which is selected via the serial bus.
Programming
The MGCM02 features very
fl
exible programming via
a 3 wire serial bus. Data is clocked in 24 bit words
with a latch pulse following the
fi
nal data bit (see
fi
g
7). The latch input must be held low at all other
times.
The serial bus not only programmes the modes of
operation but also enables unused sections of the
device to be powered on and off as required. This is
particularly important in a TDMA system when the
phone does not receive or transmit all of the time. An
added feature is the PCA (Power Control Assert) pin
which allows the MGCM02 to alternate between
receive and transmit modes without reloading
commands via the serial bus and gives more
accurate timing.
Details of the serial bus are shown below. A total of 8
words can be programmed but some of these are for
test purposes only and are not required in normal
applications.
X
RXDIV
Not used
Receive Synthesiser (LO2) Divide
Ratio
Transmit Synthesiser Divide Ratio
Receive Synthesiser Reference
Divide Ratio
Transmit Synthesiser Reference
Divide Ratio
Receive, Transmit synthesiser
Charge Pump Current control
Receive, Transmit synthesiser
Charge Pump Tristate control
Receive, Transmit synthesiser
prescaler ratio
Receive, Transmit synthesiser
phase detector polarity
Receive, Transmit lock detect
invert
Lock Detect Select
Transmit Control
Power Control System
TXDIV
REFRX
REFTX
RCP,TCP<1:0>
RTC,TTC
RPR,TPR<2:0>
RPP,TPP
TLI,RLI
LDC
TX<1,0>
PCS<2:0>
RX
LOI
TXG<2:0>
RSS<2:0>
CONT<3:0>
TXC
TC<3:0>
Receive Mode
Select low/high side LO
Transmit Gain
RSSI Control
Receive Control
Transmit Calibrate
Transmit Calibrate control - set to
1000
Sets transmit cut off frequency -
set to 00001100 for standard
25kHz cutoff
Set FM Audio
fi
lter cut off
frequency
Enables additional FM Audio
fi
ltering
LO Oscillator power down
Selects transmit output bias voltage
Selects receive output bias voltage
Selects VGA Mode - primarily used for
test purposes
CALCO<3:0>
LPC
PDF
VPD
TDC
RDC
VGA<2:0>
Bit
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Word 1
X
X
X
RXDIV <17:0>
0
0
0
Word 2
X
X
X
TXDIV <17:0>
0
0
1
Word 3
X
X
X
0
TLI
RLI
REFRX <14:0>
0
1
0
Word 4
X
X
X
0
0
TPP
REFTX <14:0>
0
1
1
Word 5
X
X
X
RPP
0
0
TPR <2:0>
RPR <2:0>
TCC
RTC
TCP <1:0>
RCO <1:0>
LDC
0
0
1
0
0
Word 6
X
X
X
X
X
X
X
TDC
X
0
TXG <2:0>
TXC
TX <1:0>
X
TC <3:0>
1
0
1
Word 7
X
X
X
0
0
0
PCS <3:0>
X
X
RSS
RX
X
CONT <3:0>
VPD
LOI
1
1
0
Word 8
CALCO <7:0>
LPC <1:0>
PDF <1:0>
RDC
TEST
0
VGA <2:0>
1
1
1
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