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參數(shù)資料
| 型號(hào)： | MF4 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | MF4 4th Order Switched Capacitor Butterworth Lowpass Filter |
| 中文描述： | MF4四階巴特沃斯低通開關(guān)電容濾波器 |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 481K |
| 代理商： | MF4 |
2.0 Designing With The MF4
(Continued)
2.3 CHANGING CLOCK FREQUENCY
INSTANTANEOUSLY
The MF4 will respond favorably to an instantaneous change
in clock frequency. If the control signal in Figure 12is low the
MF4-50 has a 100 kHz clock making f
= 2 kHz; when this
signal goes high the clock frequency changes to 50 kHz
yielding f
=1 kHz.As the Figure illustrates, the output signal
changes quickly and smoothly in response to a sudden
change in clock frequency.
The step response of the MF4 in Figure 13 is dependent on
f
. The MF4 responds as a classical fourth-order Butterworth
low-pass filter.
2.4 ALIASING CONSIDERATIONS
Aliasing effects have to be considered when input signal fre-
quencies exceed half the sampling rate. For the MF4 this
equals half the clock frequency (f
). When the input signal
contains a component at a frequency higher than half the
clock frequency f
/2, as in Figure 14a that component will
be “reflected” about f
/2 into the frequency range below
f
/2, as in Figure 14b If this component is within the pass-
band of the filter and of large enough amplitude it can cause
problems. Therefore, if frequency components in the input
signal exceed f
2 they must be attenuated before being
applied to the MF4 input. The necessary amount of attenua-
tion will vary depending on system requirements. In critical
applications the signal components above f
/2 will have to
be attenuated at least to the filter’s residual noise level.
DS005064-11
FIGURE 1. Schmitt Trigger R/C Oscillator
DS005064-12
V
IH
≥
0.8 V
cc
V
IL
≤
0.2 V
cc
V
cc
= V
+
V
FIGURE 2. Split Supply Operation with CMOS Level Clock
www.national.com
9
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