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參數(shù)資料
| 型號(hào)： | MF-622DF-T12-462 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SONET/SDH TRANSMITTER & RECEIVER |
| 中文描述： | SONET / SDH的變送器 |
| 文件頁(yè)數(shù)： | 5/10頁(yè) |
| 文件大小： | 62K |
| 代理商： | MF-622DF-T12-462 |
MITSUBISHI (OPTICAL DEVICES)
MF-622DS-T12-43x/45x/46x
MF-622DS-R13-24x
SONET/SDH TRANSMITTER & RECEIVER
RECEIVER PIN ALLOCATION
No.
1
2
3
4
5
6
7
8
9
10
Symbol
GND
GND
GND
CLK
CLK
GND
Data
GND
Data
PDB
Description
Ground
Ground
Ground
Clock
Clock
Ground
Data
Ground
Data
Photo Detector Bias
No.
20
19
18
17
16
15
14
13
12
11
Symbol
NC
NC
NC
NC
GND
GND
SD
GND
SD
Vcc
Description
No user connection
No user connection
No user connection
No user connection
Ground
Ground
Signal Detect
Ground
Signal Detect
Vcc
RECEIVER PIN DESCRIPTIONS
Pin No.
1,2,3,
6,8,13,
15,16
11
Function
GND
I/O
I
Pin description
These pin are the module’s ground connections.
They should be connected to a low impedance ground plane (0V).
Vcc
I
This is the power supply pin for the module.
It should be connected to +5.0V.
Recommended power supply decoupling.
There are Data output pin (Differential PECL output).
Signal level of these pin are PECL level.
Refer to electrical interface in NOTE4.
There are recovered clock output pin (Differential PECL output).
Signal level of these pin are PECL level.
Refer to electrical interface in NOTE4.
When the optical input signal fall bellow the SD threshold level, The Signal Detect
is deasserted and its output logic level changes form a PECL HIGH to PECL LOW.
Signal Detect pin is differential PECL output pin.
Refer to electrical interface in NOTE5.
This pin supplies the bias for the PIN Photo Detector and it should be connected to
+5.0V.
Additionally, by using External Resistor in series with this pin, it is possible to
measure the photocurrent.
Refer to electrical interface in NOTE8.
These pin are No user connection and should be left open.
7,9
Data & Data
O
4,5
Clock & Clock
O
12,14
Signal Detect
&
Signal Detect
O
10
Photo Detector Bias
I
17,18,
19,20
NC
-
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