參數(shù)資料
型號： MCZ33991EG
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： Gauge Driver Integrated Circuit
中文描述： 儀表驅(qū)動集成電路
文件頁數(shù)： 10/36頁
文件大?。?/td> 481K
代理商： MCZ33991EG
Analog Integrated Circuit Device Data
Freescale Semiconductor
10
33991
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
SPI TIMING INTERFACE
Recommended Frequency of SPI Operation
f
SPI
—
1.0
3.0
MHz
Falling edge of CS to Rising Edge of SCLK (Required Setup Time)
(15)
T
LEAD
—
50
167
ns
Falling edge of SCLK to Rising Edge of CS (Required Setup Time)
(15)
T
LAG
—
50
167
ns
SI to Falling Edge of SCLK (Required Setup Time)
(15)
TS
LSU
—
25
83
ns
Falling Edge of SCLK to SI (Required Hold Time)
(15)
TSI
(HOLD)
—
25
83
ns
SO Rise Time (CL=200pF)
Tr
SO
—
25
50
ns
SO Fall Time (CL=200pF)
Tf
SO
—
25
50
ns
SI, CS, SCLK, Incoming Signal Rise Time
(16)
Tr
SI
—
—
50
ns
SI, CS, SCLK, Incoming Signal Fall Time
(16)
Tf
SI
—
—
50
ns
Falling Edge of RST to Rising Edge of RST (Required Setup Time)
(15)
Tw
RST
—
—
3.0
μ
s
14.
Rising Edge of CS to Falling Edge of CS (Required Setup
Time)
(15)
(20)
Rising Edge of RST to Falling Edge of CS (Required Setup Time)
(15)
T
CS
—
—
5.0
μ
s
T
EN
—
—
5.0
μ
s
Time from Falling Edge of CS to SO Low Impedance
(17)
T
SO(EN)
—
—
145
ns
Time from Rising Edge of CS to SO High Impedance
(18)
T
SO(DIS)
—
1.3
4.0
μ
s
Time from Rising Edge of SCLK to SO Data Valid
(19)
0.2 V
DD
< = SO> = 0.8 V
DD
, CL = 200 pF
T
VALID
—
65
105
ns
Notes
15.
The maximum setup time that is specified for the 33991 is the minimum time needed from the micro controller to guarantee correct
operation.
Rise and Fall time of incoming SI, CS, and SCLK signals suggested for design consideration to prevent the occurrence of double pulsing.
Time required for output status data to be available for use at SO. 1 K Ohm load on SO
Time required for output status data to be terminated at SO. 1 K Ohm load on SO.
Time required to obtain valid data out from SO following the rise of SCLK.
This value is for a 1 MHz calibrated internal clock; it will change proportionally as the internal clock frequency changes.
The device shall meet all SPI interface-timing requirements specified in
the
SPI Interface Timing
, over the temperature range
specified in the environmental requirements section. Digital Interface timing is based on a symmetrical 50% duty cycle SCLK
Clock Period of 333 ns. The device shall be fully functional for slower clock speeds.
16.
17.
18.
19.
20.
Table 3. Static Electrical Characteristics (continued)
(Characteristics noted under conditions 4.75 V < V
DD
< 5.25 V, -40°C < T
J
< 150°C, unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCZ33991EGR2 功能描述:馬達(dá)/運(yùn)動/點(diǎn)火控制器和驅(qū)動器 GAUGE DRIVER IC RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Stepper Motor Controllers / Drivers 類型:2 Phase Stepper Motor Driver 工作電源電壓:8 V to 45 V 電源電流:0.5 mA 工作溫度:- 25 C to + 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HTSSOP-28 封裝:Tube
MCZ33993EW 功能描述:接口 - 專用 MSDI RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
MCZ33993EWR2 功能描述:接口 - 專用 MSDI RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:BGA-59
MCZ33996CEK 制造商:Freescale Semiconductor 功能描述:16 LOW SIDE SW - Bulk
MCZ33996CEKR2 制造商:Freescale Semiconductor 功能描述:16 LOW SIDE SW - Tape and Reel
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