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參數資料
| 型號： | MCZ33661EFR2 |
| 廠商： | Freescale Semiconductor |
| 文件頁數： | 20/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIN INTERFACE PHYSICAL 8-SOIC |
| 標準包裝： | 2,500 |
| 系列： | * |
| 應用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOICN |
| 包裝： | 帶卷 (TR) |
| 安裝類型： | 表面貼裝 |
Analog Integrated Circuit Device Data
Freescale Semiconductor
7
33661
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
Characteristics noted under conditions 7.0 V
VSUP 18 V, -40C TA 125C, GND = 0 V, unless otherwise noted. Typical
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
LIN OUTPUT TIMING CHARACTERISTICS FOR NORMAL MODE
Dominant Propagation Delay Time TXD to LIN (6)
Measurement Threshold (50% TXD to 58.1% VSUP)
Measurement Threshold (50% TXD to 28.4% VSUP)
tDOM(MIN)
tDOM(MAX)
—
50
s
Recessive Propagation Delay Time TXD to LIN (6)
Measurement Threshold (50% TXD to 42.2% VSUP)
Measurement Threshold (50% TXD to 74.4% VSUP)
tREC(MIN)
tREC(MAX)
—
50
s
Propagation Delay Time Symmetry
tDOM(MIN) to tREC(MAX)
tDOM(MAX) to tREC(MIN)
dt1
dt2
-10.44
—
8.12
s
LIN OUTPUT TIMING CHARACTERISTICS FOR SLOW MODE
Dominant Propagation Delay Time TXD to LIN (6)
Measurement Threshold (50% TXD to 61.6% VSUP)
Measurement Threshold (50% TXD to 25.1% VSUP)
tDOM(MIN)
tDOM(MAX)
—
100
s
Recessive Propagation Delay Time TXD to LIN (6)
Measurement Threshold (50% TXD to 38.9% VSUP)
Measurement Threshold (50% TXD to 77.8% VSUP)
tREC(MIN)
tREC(MAX)
—
100
s
Propagation Delay Time Symmetry
tDOM(MIN) to tREC(MAX)
tDOM(MAX) to tREC(MIN)
dt1S
dt2S
-21.88
—
17.44
s
LIN OUTPUT DRIVER FAST MODE
LIN Fast Slew Rate (Programming Mode)
Fast Slew Rate
dv/dt fast
—
15
—
V/
s
LIN PIN
Over-current Shutdown Delay Time (7)
tOV-DELAY
—
10
—
s
LIN RECEIVER CHARACTERISTICS
Receiver Dominant Propagation Delay Time (8)
LIN LOW to RXD LOW
tRL
—
3.5
6.0
s
Receiver Recessive Propagation Delay Time (8)
LIN HIGH to RXD HIGH
tRH
—
3.5
6.0
s
Receiver Propagation Delay Time Symmetry
tRL - tRH
tR-SYM
-2.0
—
2.0
s
Notes
6.
7.0 V
VSUP 18 V. Bus load R0 and C0: 1.0 nF/1.0 k, 6.8 nF/660 , 10 nF/500 .
7.
This parameter is guaranteed by design; however, it is not production tested.
8.
Measured between LIN signal threshold VLINL or VLINH and 50% of RXD signal.
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| MCZ33661EFR2 | 制造商:Freescale Semiconductor 功能描述:IC LIN INTERFACE 制造商:Freescale Semiconductor 功能描述:IC, LIN INTERFACE |
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