參數(shù)資料
型號(hào): MCP6042
廠商: Microchip Technology Inc.
英文描述: 600 nA, Rail-to-Rail Input/Output Op Amps
中文描述: 600 nA的,軌到軌輸入/輸出運(yùn)算放大器
文件頁(yè)數(shù): 12/32頁(yè)
文件大?。?/td> 621K
代理商: MCP6042
MCP6041/2/3/4
DS21669B-page 12
2002 Microchip Technology Inc.
macro model and bench testing to adjust R
ISO
until the
frequency response peaking is reasonable. Use the
smallest reasonable value.
FIGURE 3-2:
capacitive loads.
Amplifier circuit for heavy
3.6
The MCP6043 Chip Select (CS)
Option
The MCP6043 is a single amplifier with a chip select
(CS) option. When CS is pulled high, the supply current
drops to 20 pA (typ) and goes through the CS pin to
V
SS
. When this happens, the amplifier is put into a high
impedance state. By pulling CS low, the amplifier is
enabled. If the CS pin is left floating, the amplifier will
not operate properly. Figure 3-3 shows the output volt-
age and supply current response to a CS pulse.
FIGURE 3-3:
function on the MCP6043 op amp.
Timing Diagram for the CS
3.7
Layout Considerations
Good PC board layout techniques will help you achieve
the performance shown in the specs and Typical Per-
formance Curves. It will also assist in minimizing Elec-
tro-Magnetic Compatibility (EMC) issues.
3.7.1
SURFACE LEAKAGE
In applications where low input bias current is critical,
PC board surface leakage effects and signal coupling
from trace to trace need to be considered.
Surface leakage is caused by a difference in voltage
between traces, combined with high humidity, dust or
other contamination on the board. Under low humidity
conditions, a typical resistance between nearby traces
is 10
12
. A 5 V difference would cause 5 pA of current
to flow; this is greater than the input current of the
MCP6041/2/3/4 family at 25°C (1 pA, typ).
The simplest technique to reduce surface leakage is
using a guard ring around sensitive pins (or traces).
The guard ring is biased at the same voltage as the
sensitive pin or trace. Figure 3-4 shows an example of
a typical layout.
FIGURE 3-4:
layout.
Example of Guard Ring
Circuit schematics for different guard ring implementa-
tions are shown in Figure 3-5. Figure 3-5A biases the
guard ring to the input common mode voltage, which is
most effective for non-inverting gains, including unity
gain. Figure 3-5B biases the guard ring to a reference
voltage (V
REF
, which can be ground). This is useful for
inverting gains and precision photo sensing circuits.
FIGURE 3-5:
connection strategies to reduce surface leakage
effects.
Two possible guard ring
V
IN
R
ISO
V
OUT
MCP604X
C
L
V
IL
Hi-Z
t
ON
V
IH
CS
t
OFF
V
OUT
I
VDD
20 pA, typ
Hi-Z
I
VSS
I
CS
5 pA, typ
5 pA, typ
20 pA, typ
0.6 μA, typ
5 pA, typ
0.6 μA, typ
5 pA, typ
Guard Ring
V
SS
IN-
IN+
V
REF
MCP604X
Figure 3-5A
Figure 3-5B
V
DD
V
REF
MCP604X
V
DD
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參數(shù)描述
MCP6042-E/MS 功能描述:運(yùn)算放大器 - 運(yùn)放 Single 1.6V 10KHz RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比(最小值):63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流(最大值):10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel
MCP6042-E/MS 制造商:Microchip Technology Inc 功能描述:; LEADED PROCESS COMPATIBLE:YES; PEAK RE
MCP6042-E/P 功能描述:運(yùn)算放大器 - 運(yùn)放 Dual 1.6V 10KHz RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比(最小值):63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流(最大值):10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel
MCP6042-E/P 制造商:Microchip Technology Inc 功能描述:; LEADED PROCESS COMPATIBLE:YES; PEAK RE 制造商:Microchip Technology Inc 功能描述:IC, OP-AMP, 14kHZ, 0.003V/ us, 3mV, DIP8
MCP6042-E/SN 功能描述:運(yùn)算放大器 - 運(yùn)放 Dual 1.6V 10KHz RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比(最小值):63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流(最大值):10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel