參數(shù)資料
型號(hào): MCP6024
廠商: Microchip Technology Inc.
元件分類: FPGA
英文描述: 300000 SYSTEM GATE 2.5 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
中文描述: 軌到軌輸入/輸出,10兆赫運(yùn)算放大器
文件頁(yè)數(shù): 8/28頁(yè)
文件大?。?/td> 618K
代理商: MCP6024
MCP6021/2/3/4
DS21685B-page 8
2003 Microchip Technology Inc.
Note:
Unless otherwise indicated, T
A
= +25°C, V
DD
= +2.5V to +5.5V, V
SS
= GND, V
CM
= V
DD
/2, R
L
= 10 k
to V
DD
/2,
V
OUT
V
DD
/2 and C
L
= 60 pF.
FIGURE 2-19:
Load Resistance.
DC Open-Loop Gain vs.
FIGURE 2-20:
Gain vs. Output Voltage Headroom.
Small Signal DC Open-Loop
FIGURE 2-21:
Phase Margin vs. Temperature.
Gain Bandwidth Product,
FIGURE 2-22:
Temperature.
DC Open-Loop Gain vs.
FIGURE 2-23:
Phase Margin vs. Common Mode Input Voltage.
Gain Bandwidth Product,
FIGURE 2-24:
Phase Margin vs. Output Voltage.
Gain Bandwidth Product,
80
90
100
110
120
130
1.E+02
1.E+03
1.E+04
1.E+05
Load Resistance (
:
)
D
V
DD
= 5.5V
V
DD
= 2.5V
100
1k
10k
100k
70
80
90
100
110
120
0.00
0.05
0.10
0.15
0.20
0.25
0.30
Output Voltage Headroom (V);
V
DD
- V
OH
or V
OL
- V
SS
D
V
CM
= V
DD
/2
V
DD
= 2.5V
V
DD
= 5.5V
0
1
2
3
4
5
6
7
8
9
10
-50
-25
0
25
50
75
100
125
Ambient Temperature (°C)
G
(
0
10
20
30
40
50
60
70
80
90
100
P
GBWP, V
DD
= 5.5V
GBWP, V
DD
= 2.5V
PM, V
DD
= 2.5V
PM, V
DD
= 5.5V
90
95
100
105
110
115
120
-50
-25
0
25
50
75
100
125
Ambient Temperature (°C)
D
V
DD
= 5.5V
V
DD
= 2.5V
0
2
4
6
8
10
12
14
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Common Mode Input Voltage (V)
G
(
0
15
30
45
60
75
90
105
P
Gain Bandwidth Product
Phase Margin, G = +1
V
DD
= 5.0V
0
2
4
6
8
10
12
14
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Output Voltage (V)
G
(
0
15
30
45
60
75
90
105
P
Gain Bandwidth Product
Phase Margin, G = +1
V
DD
= 5.0V
V
CM
= V
DD
/2
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