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參數(shù)資料
| 型號(hào)： | MCP4728EV |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 23/33頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL 12BIT 4CH DAC MCP4728 |
| 視頻文件： | MCP4728 Evaluation Board Demo |
| 標(biāo)準(zhǔn)包裝： | 1 |
| DAC 的數(shù)量： | 4 |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | I²C |
| 設(shè)置時(shí)間： | 6µs |
| DAC 型： | 電壓 |
| 工作溫度： | -40°C ~ 125°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | MCP4728 |
| 產(chǎn)品目錄頁面： | 673 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | MCP4728T-E/UN-ND - IC DAC 12BIT W/I2C 10-MSOP MCP4728-E/UN-ND - IC DAC 12BIT W/I2C 10-MSOP |
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2010 Microchip Technology Inc.
DS22187E-page 3
MCP4728
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings
VDD...................................................................................6.5V
All inputs and outputs w.r.t VSS ................. -0.3V to VDD+0.3V
Current at Input Pins ....................................................±2 mA
Current at Supply Pins ............................................. ±110 mA
Current at Output Pins ...............................................±25 mA
Storage Temperature ...................................-65°C to +150°C
Ambient Temp. with Power Applied .............-55°C to +125°C
ESD protection on all pins
................ ≥ 4 kV HBM, ≥ 400V MM
Maximum Junction Temperature (TJ) ......................... +150°C
Notice: Stresses above those listed under “Maximum
ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability.
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all parameters apply at V
DD = +2.7V to 5.5V, VSS =0V,
RL =5 kΩ, CL = 100 pF, GX =1, TA = -40°C to +125°C. Typical values are at +25°C, VIH =VDD, VIL =VSS.
Parameter
Symbol
Min
Typical
Max
Units
Conditions
Power Requirements
Operating Voltage
VDD
2.7
5.5
V
Supply Current with
External Reference
(VREF =VDD)
IDD_EXT
—
800
1400
A
VREF =VDD, VDD =5.5V
All 4 channels are in Normal mode.
—
600
—
A
3 channels are in Normal mode,
1 channel is powered down.
—
400
—
A
2 channels are in Normal mode,
2 channel are powered down.
—
200
—
A
1 channel is in Normal mode,
3 channels are powered down.
Power-Down Current with
External Reference
IPD_EXT
—
40
—
nA
All 4 channels are powered down.
(VREF =VDD)
Supply Current with
Internal Reference
(VREF = Internal)
IDD_INT
—
800
1400
A
VREF = Internal Reference
VDD =5.5V
All 4 channels are in normal mode.
—
600
—
A
3 channels are in Normal mode,
1 channel is powered down.
—
400
—
A
2 channels are in Normal mode,
2 channels are powered down.
—
200
—
A
1 channel is in Normal mode,
3 channels are powered down.
Power-Down Current with
Internal Reference
IPD_INT
—
45
60
A
All 4 channels are powered down.
VREF = Internal Reference
Note 1:
All digital input pins (SDA, SCL, LDAC) are tied to “High”, Output pins are unloaded, code = 0 x 000.
2:
The power-up ramp rate measures the rise of VDD over time.
3:
This parameter is ensured by design and not 100% tested.
4:
This parameter is ensured by characterization and not 100% tested.
5:
Test code range: 100 - 4000 codes, VREF = VDD, VDD = 5.5V.
6:
Time delay to settle to a new reference when switching from external to internal reference or vice versa.
7:
This parameter is indirectly tested by Offset and Gain error testing.
8:
Within 1/2 LSB of the final value when code changes from 1/4 of to 3/4 of full scale.
9:
This time delay is measured from the falling edge of ACK pulse in I2C command to the beginning of VOUT.
This time delay is not included in the output settling time specification.
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