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參數(shù)資料
| 型號： | MCP4725A0T-E/CH |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 6 us SETTLING TIME, 12-BIT DAC, PDSO6 |
| 封裝： | PLASTIC, SOT-23, 6 PIN |
| 文件頁數(shù)： | 23/50頁 |
| 文件大?。?/td> | 1494K |
| 代理商： | MCP4725A0T-E/CH |
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2009 Microchip Technology Inc.
DS22039D-page 3
MCP4725
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings
VDD...................................................................................6.5V
All inputs and outputs w.r.t VSS .................–0.3V to VDD+0.3V
Current at Input Pins ....................................................±2 mA
Current at Supply Pins ...............................................±50 mA
Current at Output Pins ...............................................±25 mA
Storage Temperature ...................................-65°C to +150°C
Ambient Temp. with Power Applied .............-55°C to +125°C
ESD protection on all pins
................ ≥ 6kV HBM, ≥ 400V MM
Maximum Junction Temperature (TJ) ......................... +150°C
Notice: Stresses above those listed under “Maximum
ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all parameters apply at VDD = + 2.7V to 5.5V, VSS = 0V,
RL = 5 k from VOUT to VSS, CL = 100 pF, TA = -40°C to +125°C. Typical values are at +25°C.
Parameter
Sym
Min
Typ
Max
Units
Conditions
Power Requirements
Operating Voltage
VDD
2.7
5.5
V
Supply Current
IDD
—
210
400
A
Digital input pins are
grounded, Output pin (VOUT)
is not connected (unloaded),
Code = 000h
Power-Down Current
IDDP
—0.06
2.0
A
VDD = 5.5V
Power-On-Reset
Threshold Voltage
VPOR
—2
—
V
DC Accuracy
Resolution
n
12
—
Bits
Code Range = 000h to FFFh
INL Error
INL
—
±2
±14.5
LSB
DNL
-0.75
±0.2
±0.75
LSB
Offset Error
VOS
0.02
0.75
% of FSR Code = 000h
Offset Error Drift
ΔVOS/°C
—
±1
—
ppm/°C
-45°C to +25°C
—
±2
—
ppm/°C
+25°C to +85°C
Gain Error
GE
-2
-0.1
2
% of FSR Code = FFFh,
Offset error is not included.
Gain Error Drift
ΔGE/°C
—
-3
—
ppm/°C
Output Amplifier
Phase Margin
pM
—
66
—
Degree(°) CL = 400 pF, RL = ∞
Capacitive Load Stability
CL
—
1000
pF
Slew Rate
SR
—
0.55
—
V/s
Short Circuit Current
ISC
—15
24
mA
VDD = 5V, VOUT = Grounded
Output Voltage Settling
Time
TS
—6
—
s
Note 1: Test Code Range: 100 to 4000.
2: This parameter is ensure by design and not 100% tested.
3: Within 1/2 LSB of the final value when code changes from 1/4 to 3/4 (400h to C00h) of full scale range.
4: Logic state of external address selection pin (A0 pin).
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