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鍙冩暩璩囨枡
鍨嬭櫉锛� MCP4551T-104E/MS
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩锛� 55/88闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC POT DGTL 100K SGL 8-MSOP
妯欐簴鍖呰锛� 2,500
鎺ョ墖锛� 257
闆婚樆锛堟瓙濮嗭級锛� 100k
闆昏矾鏁革細 1
婧害绯绘暩锛� 妯欐簴鍊� 150 ppm/°C
瀛樺劜鍣ㄩ鍨嬶細 鏄撳け
鎺ュ彛锛� I²C锛堣ō鍌欎綅鍧€锛�
闆绘簮闆诲锛� 1.8 V ~ 5.5 V
宸ヤ綔婧害锛� -40°C ~ 125°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-TSSOP锛�8-MSOP锛�0.118"锛�3.00mm 瀵級
渚涙噳鍟嗚ō鍌欏皝瑁濓細 8-MSOP
鍖呰锛� 甯跺嵎 (TR)
2008 Microchip Technology Inc.
DS22096A-page 59
MCP453X/455X/463X/465X
FIGURE 7-4:
I2C Read (Last Memory Address Accessed).
FIGURE 7-5:
I2C Random Read.
STOP bit
Control Byte
1
010
SA2 A1 A0 1
A
Fixed
Address
Variable
Address
Read bits
P
0
000
0
0 D8 A1
Read bit
D3
D7 D6 D5 D4
D2 D1 D0 A2
Read Data bits
Note 1: Master Device is responsible for A / A signal. If a A signal occurs, the MCP45XX/46XX will
abort this transfer and release the bus.
2: The Master Device will Not Acknowledge, and the MCP45XX/46XX will release the bus so the
Master Device can generate a Stop or Repeated Start condition.
3: The MCP45xx/46xx retains the last 鈥淒evice Memory Address鈥� that it has received. This is the
MCP45XX/46XX does not 鈥渃orrupt鈥� the 鈥淒evice Memory Address鈥� after Repeated Start or
Stop conditions.
4: The Device Memory Address pointer defaults to 00h on POR and BOR conditions.
STOP bit
Control Byte
READ Command
1
01
0
SA2 A1 A0 0
1
AD AD AD AD
A1
x X
A Sr
0
1
2
3
Fixed
Address
Variable
Address
Device
Memory
Address
Command
Control Byte
Read bits
P
0
00
0
0 D8 A1
Write bit
D3
D7 D6 D5 D4
D2 D1 D0 A2
1
01
0
A2 A1 A0 1
A
Read bit
Repeated Start bit
Read Data bits
Note 1: Master Device is responsible for A / A signal. If a A signal occurs, the MCP45XX/46XX will
abort this transfer and release the bus.
2: The Master Device will Not Acknowledge, and the MCP45XX/46XX will release the bus so the
Master Device can generate a Stop or Repeated Start condition.
3: The MCP45XX/46XX retains the last 鈥淒evice Memory Address鈥� that it has received. This is
the MCP45XX/46XX does not 鈥渃orrupt鈥� the 鈥淒evice Memory Address鈥� after Repeated Start or
Stop conditions.
鐩搁棞PDF璩囨枡
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鍙冩暩鎻忚堪
MCP4551T-502E/MF 鍔熻兘鎻忚堪:鏁稿瓧闆讳綅瑷� IC Sngl 8B V I2C POT RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 闆婚樆:200 Ohms 婧害绯绘暩:35 PPM / C 瀹瑰樊:25 % POT 鏁搁噺:Dual 姣� POT 鍒嗘帴闋�:256 寮у埛瀛樺劜鍣�:Volatile 绶╂矕鍒�: 鏁稿瓧鎺ュ彛:Serial (3-Wire, SPI) 鎻忚堪/鍔熻兘:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 宸ヤ綔闆绘簮闆诲:1.7 V to 5.5 V 闆绘簮闆绘祦:27 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:TQFN-16 灏佽:Reel
MCP4551T-502E/MS 鍔熻兘鎻忚堪:鏁稿瓧闆讳綅瑷� IC Sngl 8B V I2C POT RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 闆婚樆:200 Ohms 婧害绯绘暩:35 PPM / C 瀹瑰樊:25 % POT 鏁搁噺:Dual 姣� POT 鍒嗘帴闋�:256 寮у埛瀛樺劜鍣�:Volatile 绶╂矕鍒�: 鏁稿瓧鎺ュ彛:Serial (3-Wire, SPI) 鎻忚堪/鍔熻兘:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 宸ヤ綔闆绘簮闆诲:1.7 V to 5.5 V 闆绘簮闆绘祦:27 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:TQFN-16 灏佽:Reel
MCP4551T-503E/MF 鍔熻兘鎻忚堪:鏁稿瓧闆讳綅瑷� IC Sngl 8B V I2C POT RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 闆婚樆:200 Ohms 婧害绯绘暩:35 PPM / C 瀹瑰樊:25 % POT 鏁搁噺:Dual 姣� POT 鍒嗘帴闋�:256 寮у埛瀛樺劜鍣�:Volatile 绶╂矕鍒�: 鏁稿瓧鎺ュ彛:Serial (3-Wire, SPI) 鎻忚堪/鍔熻兘:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 宸ヤ綔闆绘簮闆诲:1.7 V to 5.5 V 闆绘簮闆绘祦:27 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:TQFN-16 灏佽:Reel
MCP4551T-503E/MS 鍔熻兘鎻忚堪:鏁稿瓧闆讳綅瑷� IC Sngl 8B V I2C POT RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 闆婚樆:200 Ohms 婧害绯绘暩:35 PPM / C 瀹瑰樊:25 % POT 鏁搁噺:Dual 姣� POT 鍒嗘帴闋�:256 寮у埛瀛樺劜鍣�:Volatile 绶╂矕鍒�: 鏁稿瓧鎺ュ彛:Serial (3-Wire, SPI) 鎻忚堪/鍔熻兘:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 宸ヤ綔闆绘簮闆诲:1.7 V to 5.5 V 闆绘簮闆绘祦:27 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:TQFN-16 灏佽:Reel
MCP4552-103E/MS 鍔熻兘鎻忚堪:鏁稿瓧闆讳綅瑷� IC Sngl 8B V I2C Rheo RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 闆婚樆:200 Ohms 婧害绯绘暩:35 PPM / C 瀹瑰樊:25 % POT 鏁搁噺:Dual 姣� POT 鍒嗘帴闋�:256 寮у埛瀛樺劜鍣�:Volatile 绶╂矕鍒�: 鏁稿瓧鎺ュ彛:Serial (3-Wire, SPI) 鎻忚堪/鍔熻兘:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 宸ヤ綔闆绘簮闆诲:1.7 V to 5.5 V 闆绘簮闆绘祦:27 uA 鏈€澶у伐浣滄韩搴�:+ 125 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:TQFN-16 灏佽:Reel