參數資料
型號: MCP4361T-503E/ML
廠商: Microchip Technology
文件頁數: 22/59頁
文件大?。?/td> 0K
描述: IC DGTL POT QUAD 50K 20QFN
標準包裝: 3,300
系列: WiperLock™
接片: 257
電阻(歐姆): 50k
電路數: 4
溫度系數: 標準值 150 ppm/°C
存儲器類型: 非易失
接口: 4 線 SPI(芯片選擇)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-VFQFN 裸露焊盤
供應商設備封裝: 20-QFN 裸露焊盤(4x4)
包裝: 帶卷 (TR)
2009 Microchip Technology Inc.
DS22233A-page 29
MCP434X/436X
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
Additional descriptions of the device pins follows.
TABLE 3-1:
PINOUT DESCRIPTION FOR THE MCP434X/436X
Pin
Weak
Pull-up/
down
Standard Function
TSSOP
QFN
Symbol
I/O
Buffer
Type
14L
20L
—1
19
P3A
A
Analog
No
Potentiometer 3 Terminal A
12
20
P3W
A
Analog
No
Potentiometer 3 Wiper Terminal
23
1
P3B
A
Analog
No
Potentiometer 3 Terminal B
34
2
CS
I
HV w/ST
“smart”
SPI Chip Select Input
45
3
SCK
I
HV w/ST
“smart”
SPI Clock Input
56
4
SDI
I
HV w/ST
“smart”
SPI Serial Data Input
67
5
VSS
—P
Ground
78
6
P1B
A
Analog
No
Potentiometer 1 Terminal B
89
7
P1W
A
Analog
No
Potentiometer 1 Wiper Terminal
—10
8
P1A
A
Analog
No
Potentiometer 1 Terminal A
—11
9
P0A
A
Analog
No
Potentiometer 0 Terminal A
912
10
P0W
A
Analog
No
Potentiometer 0 Wiper Terminal
10
13
11
P0B
A
Analog
No
Potentiometer 0 Terminal B
—14
12
WP
I
“smart”
Hardware EEPROM Write Protect
—15
13
RESET
I
HV w/ST
Yes
Hardware Reset Pin
11
16
14
SDO
O
No
SPI Serial Data Output
12
17
15
VDD
—P
Positive Power Supply Input
13
18
16
P2B
A
Analog
No
Potentiometer 2 Terminal B
14
19
17
P2W
A
Analog
No
Potentiometer 2 Wiper Terminal
—20
18
P2A
A
Analog
No
Potentiometer 2 Terminal A
——
21
EP
Exposed Pad. (Note 2)
Legend:
HV w/ST = High Voltage tolerant input (with Schmidtt trigger input)
A = Analog pins (Potentiometer terminals)
I = digital input (high Z)
O = digital output
I/O = Input / Output
P = Power
Note 1:
The pin’s “smart” pull-up shuts off while the pin is forced low. This is done to reduce the standby and
shut-down current.
2:
The QFN package has a contact on the bottom of the package. This contact is conductively connected to
the die substrate, and therefore should be unconnected or connected to the same ground as the device’s
VSS pin.
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