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| 型號： | MCP4242-104E/UN |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 28/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT DL 100K 2CH 10-MSOP |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 系列： | WiperLock™ |
| 接片： | 129 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 150 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | 4 線 SPI（芯片選擇） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 676 (CN2011-ZH PDF) |
| 其它名稱： | MCP4242-104-E/UN MCP4242-104-E/UN-ND |
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MCP414X/416X/424X/426X
DS22059B-page 34
2008 Microchip Technology Inc.
REGISTER 4-2:
TCON BITS (1, 2)
R-1
R/W-1
D8
R1HW
R1A
R1W
R1B
R0HW
R0A
R0W
R0B
bit 8
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 8
D8:
Reserved. Forced to “1”
bit 7
R1HW:
Resistor 1 Hardware Configuration Control bit
This bit forces Resistor 1 into the “shutdown” configuration of the Hardware pin
1
= Resistor 1 is NOT forced to the hardware pin “shutdown” configuration
0
= Resistor 1 is forced to the hardware pin “shutdown” configuration
bit 6
R1A:
Resistor 1 Terminal A (P1A pin) Connect Control bit
This bit connects/disconnects the Resistor 1 Terminal A to the Resistor 1 Network
1
= P1A pin is connected to the Resistor 1 Network
0
= P1A pin is disconnected from the Resistor 1 Network
bit 5
R1W:
Resistor 1 Wiper (P1W pin) Connect Control bit
This bit connects/disconnects the Resistor 1 Wiper to the Resistor 1 Network
1
= P1W pin is connected to the Resistor 1 Network
0
= P1W pin is disconnected from the Resistor 1 Network
bit 4
R1B:
Resistor 1 Terminal B (P1B pin) Connect Control bit
This bit connects/disconnects the Resistor 1 Terminal B to the Resistor 1 Network
1
= P1B pin is connected to the Resistor 1 Network
0
= P1B pin is disconnected from the Resistor 1 Network
bit 3
R0HW:
Resistor 0 Hardware Configuration Control bit
This bit forces Resistor 0 into the “shutdown” configuration of the Hardware pin
1
= Resistor 0 is NOT forced to the hardware pin “shutdown” configuration
0
= Resistor 0 is forced to the hardware pin “shutdown” configuration
bit 2
R0A:
Resistor 0 Terminal A (P0A pin) Connect Control bit
This bit connects/disconnects the Resistor 0 Terminal A to the Resistor 0 Network
1
= P0A pin is connected to the Resistor 0 Network
0
= P0A pin is disconnected from the Resistor 0 Network
bit 1
R0W:
Resistor 0 Wiper (P0W pin) Connect Control bit
This bit connects/disconnects the Resistor 0 Wiper to the Resistor 0 Network
1
= P0W pin is connected to the Resistor 0 Network
0
= P0W pin is disconnected from the Resistor 0 Network
bit 0
R0B:
Resistor 0 Terminal B (P0B pin) Connect Control bit
This bit connects/disconnects the Resistor 0 Terminal B to the Resistor 0 Network
1
= P0B pin is connected to the Resistor 0 Network
0
= P0B pin is disconnected from the Resistor 0 Network
Note 1:
The hardware SHDN pin (when active) overrides the state of these bits. When the SHDN pin returns to the
inactive state, the TCON register will control the state of the terminals. The SHDN pin does not modify the
state of the TCON bits.
2:
These bits do not affect the wiper register values.
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