- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9326 > MCP4152-502E/SN (Microchip Technology)IC POT DGTL SNGL 5K RHEO 8SOIC PDF資料下載
參數(shù)資料
| 型號(hào)： | MCP4152-502E/SN |
| 廠商： | Microchip Technology |
| 文件頁(yè)數(shù)： | 35/59頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DGTL SNGL 5K RHEO 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 接片： | 257 |
| 電阻（歐姆）： | 5k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 150 ppm/°C |
| 存儲(chǔ)器類型： | 易失 |
| 接口： | 4 線 SPI（芯片選擇） |
| 電源電壓： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOICN |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 675 (CN2011-ZH PDF) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)當(dāng)前第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)
Micrel, Inc.
KSZ8051MNL/RNL
July 2010
40
M9999-070910-1.0
Register Description (Continued)
Address
Name
Description
Mode
(1)
Default
Register 18h – Expanded Control
18.15:12
Reserved
RW
0000
18.11
EDPD
Disabled
Energy Detect Power Down mode
1 = Disable
0 = Enable
RW
1
18.10
100Base-TX
Preamble
Restore
1 = Restore received preamble to MII output
(random latency)
0 = Consume 1-byte preamble before sending
frame to MII output for fixed latency
This bit is applicable for KSZ8051MNL only.
RW
0
18.9:7
Reserved
RW
000
18.6
10Base-T
Preamble
Restore
1 = Restore received preamble to MII output
0 = Remove all 7-bytes of preamble before
sending frame (starting with SFD) to MII
output
This bit is applicable for KSZ8051MNL only.
RW
0
18.5:0
Reserved
RW
00_0000
Register 1Bh – Interrupt Control/Status
1b.15
Jabber
Interrupt
Enable
1 = Enable Jabber Interrupt
0 = Disable Jabber Interrupt
RW
0
1b.14
Receive Error
Interrupt
Enable
1 = Enable Receive Error Interrupt
0 = Disable Receive Error Interrupt
RW
0
1b.13
Page Received
Interrupt
Enable
1 = Enable Page Received Interrupt
0 = Disable Page Received Interrupt
RW
0
1b.12
Parallel Detect
Fault Interrupt
Enable
1 = Enable Parallel Detect Fault Interrupt
0 = Disable Parallel Detect Fault Interrupt
RW
0
1b.11
Link Partner
Acknowledge
Interrupt
Enable
1 = Enable Link Partner Acknowledge Interrupt
0 = Disable Link Partner Acknowledge
Interrupt
RW
0
1b.10
Link Down
Interrupt
Enable
1= Enable Link Down Interrupt
0 = Disable Link Down Interrupt
RW
0
1b.9
Remote Fault
Interrupt
Enable
1 = Enable Remote Fault Interrupt
0 = Disable Remote Fault Interrupt
RW
0
1b.8
Link Up
Interrupt
Enable
1 = Enable Link Up Interrupt
0 = Disable Link Up Interrupt
RW
0
1b.7
Jabber
Interrupt
1 = Jabber occurred
0 = Jabber did not occurred
RO/SC
0
1b.6
Receive Error
Interrupt
1 = Receive Error occurred
0 = Receive Error did not occurred
RO/SC
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCP4152-502E/P | IC POT DGTL SNGL 5K RHEO 8DIP |
| DS17887-3 | IC RTC 3V 8K NV RAM 24-EDIP |
| VI-2NM-MY-F3 | CONVERTER MOD DC/DC 10V 50W |
| VI-2NM-MY-F2 | CONVERTER MOD DC/DC 10V 50W |
| MCP4242T-502E/UN | IC RHEOSTAT 5K 2CH 10MSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCP4152-502I/MF | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Volatile Memory |
| MCP4152-502I/ML | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Volatile Memory |
| MCP4152-502I/MS | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Volatile Memory |
| MCP4152-502I/P | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Volatile Memory |
| MCP4152-502I/SL | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:7/8-Bit Single/Dual SPI Digital POT with Volatile Memory |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。