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參數(shù)資料
| 型號： | MCP4142T-502E/MF |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 88/88頁 |
| 文件大小： | 0K |
| 描述： | ID DGTL SNGL 5K SPI 8DFN |
| 標準包裝： | 3,300 |
| 系列： | WiperLock™ |
| 接片： | 129 |
| 電阻（歐姆）： | 5k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標準值 150 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 4 線 SPI（芯片選擇） |
| 電源電壓： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-VDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 8-DFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
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2008 Microchip Technology Inc.
DS22059B-page 9
MCP414X/416X/424X/426X
Digital Inputs/Outputs (CS, SDI, SDO, SCK, WP, SHDN)
Schmitt Trigger
High Input
Threshold
VIH
0.45 VDD
——
V
2.7V
≤ VDD ≤ 5.5V
(Allows 2.7V Digital VDD with
5V Analog VDD)
0.5 VDD
——
V
1.8V
≤ VDD ≤ 2.7V
Schmitt Trigger
Low Input
Threshold
VIL
—
0.2VDD
V
Hysteresis of
Schmitt Trigger
Inputs
VHYS
—0.1VDD
—V
High Voltage Input
Entry Voltage
VIHH
8.5
—
12.5 (6)
V
Threshold for WiperLock Technology
High Voltage Input
Exit Voltage
VIHH
——
VDD +
0.8V (6)
V
High Voltage Limit
VMAX
——
12.5 (6)
V
Pin can tolerate VMAX or less.
Output Low
Voltage (SDO)
VOL
VSS
—0.3VDD
VIOL = 5 mA, VDD = 5.5V
VSS
—0.3VDD
VIOL = 1 mA, VDD = 1.8V
Output High
Voltage (SDO)
VOH
0.7VDD
—VDD
VIOH = -2.5 mA, VDD = 5.5V
0.7VDD
—VDD
VIOL = -1 mA, VDD = 1.8V
Weak Pull-up /
Pull-down Current
IPU
—
1.75
mA
Internal VDD pull-up, VIHH pull-down,
VDD = 5.5V, VCS = 12.5V
—170
—
A
CS pin, VDD = 5.5V, VCS = 3V
CS Pull-up /
Pull-down
Resistance
RCS
—16
—
k
VDD = 5.5V, VCS = 3V
Input Leakage
Current
IIL
-1
—
1
A
VIN = VDD and VIN = VSS
Pin Capacitance
CIN, COUT
—10
—
pF
fC = 20 MHz
AC/DC CHARACTERISTICS (CONTINUED)
DC Characteristics
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C
≤ TA ≤ +125°C (extended)
All parameters apply across the specified operating ranges unless noted.
VDD = +2.7V to 5.5V, 5 k, 10 k, 50 k, 100 k devices.
Typical specifications represent values for VDD = 5.5V, TA = +25°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Note 1:
Resistance is defined as the resistance between terminal A to terminal B.
2:
INL and DNL are measured at VW with VA = VDD and VB = VSS.
3:
MCP4XX1
only.
4:
MCP4XX2
only, includes VWZSE and VWFSE.
5:
Resistor terminals A, W and B’s polarity with respect to each other is not restricted.
6:
This specification by design.
7:
Non-linearity is affected by wiper resistance (RW), which changes significantly over voltage and
temperature.
8:
The MCP4XX1 is externally connected to match the configurations of the MCP41X2 and MCP42X2, and
then tested.
9:
POR/BOR is not rate dependent.
10:
Supply current is independent of current through the resistor network
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